zl50018gag2 Zarlink Semiconductor, zl50018gag2 Datasheet - Page 105

• Manufacturer Part Number: zl50018gag2
• Description: 2 K Digital Switch With Enhanced Stratum 3 Dpll
• Manufacturer: Zarlink Semiconductor

25.1.2
When an external clock oscillator is used, numerous parameters must be considered. They include absolute
frequency, frequency change over temperature, output rise and fall times, output levels and duty cycle.
The output clock should be connected directly (not AC coupled) to the OSCi input of the device, and the OSCo
output should be left open as shown in Figure 24 on page 105. XC is a buffered version of the 20 MHz input clock
connected to the internal circuitry.
For applications requiring ±32ppm clock accuracy, the following requirements should be met:
For applications requiring Stratum 3 compliance (±4.6 ppm clock accuracy), the following temperature
compensated clock oscillator module may be used.
Load Capacitance
Maximum Series Resistance
Approximate Drive Level
Frequency
Tolerance
Rise and Fall Time
Duty Cycle
Frequency
Tolerance
Rise and Fall Time
Duty Cycle
External Clock Oscillator
XC
2 K DX
Figure 24 - Clock Oscillator Circuit
20 pF - 32 pF
35 Ω
1 mW
Zarlink Semiconductor Inc.
20.000 MHz
±32 ppm
10 ns
40% to 60%
20.000 MHz
±4.6 ppm
10 ns
40% to 60%
ZL50018
OSCo
OSCi
No Connection
105
20 MHz OUT
+3.3 V
+3.3 V
GND
0.1 uF
Data Sheet