mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 57

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

# Seq Bits/UUI M
S S R A M M a p p in g - H D L C /x x P C M C P S -P a c k e t D is a s s e b ly S tr u c tu r e S p a c e
F ie ld s in Ita lic a re u s e d b y H a rd w a re o n ly . F ie ld s in P la in a re w ritte n to b y th e C P U /S o f tw a re .
C P S -P a c k e t D is a s s e m b ly s tru c tu re s lo c a te d in R X S S R A M m e m o ry . A d d re s s ra n g e o f s tru c u tre s is + 6 0 0 0 h to
+ 6 F E 0 h , + C 0 0 0 h to + D F E 0 h , + 1 8 0 0 0 h to + 1 B F E 0 h a n d + 3 0 0 0 0 h to + 3 7 F E 0 h f o r 1 2 8 , 2 5 6 , 5 1 2 a n d 1 0 2 3
c h a n n e ls re s p e c tiv e ly .
In d e x o f s tru c tu re is g iv e n b y C P S -P a c k e t D is a s s e m b ly S tru c tu re N u m b e r (+ 0 0 h [b 9 :b 0 ]) in C ID D e s c rip to r
S tru c tu re .
E a c h s tru c tu re is 3 2 -b y te s in s iz e .
+ 7 F C 0 h
+ 7 F E 0 h
+ 7 F A 0 h
Field
+ 0 0 2 0 h
+ 0 0 6 0 h
+ 0 0 8 0 h
+ 0 0 4 0 h
+ 0 0 0 0 h
RU
RL
Table 22 - CPS-Packet Disassembly Structure (PCM/ADPCM) Fields (continued)
C P S -P a c k e t D is . S tru c t. 1 0 2 1
C P S -P a c k e t D is . S tru c t. 1 0 2 2
C P S -P a c k e t D is . S tru c t. 1 0 2 3
C P S -P a c k e t D is . S tru c t. 0
C P S -P a c k e t D is . S tru c t. 1
C P S -P a c k e t D is . S tru c t. 2
C P S -P a c k e t D is . S tru c t. 3
C P S -P a c k e t D is . S tru c t. 4
Name of Field
Report Length
Errors
Report UUI
Errors
Number of
Sequence Bits
in the UUI and
UUI Match
Figure 25 - CPS-Packet Disassembly Structure (HDLC Format)
Byte Address
Offset/Bits
+10/b4:b0
+10/b7
+10/b6
Zarlink Semiconductor Inc.
Used
MT90502
57
+ 0 h
+ 2 h
+ 4 h
+ 6 h
+ 8 h
+ A h
+ C h
+ E h
+ 1 0 h
Report each CPS-Packet received in which the LI
does not match Expected LI.
Report each CPS-Packet received in which the UUI
does not match expected UUI.
‘10000’ = 4 sequence bits
‘x1000’ = 3 sequence bits & UUI[3] in match
‘xx100’ = 2 sequence bits & UUI[3:2] in match
‘xxx10’ = 1 sequence bit & UUI[3:1] in match
‘xxxx1’ = 0 sequence bits & UUI[3:0] in match
b 1 5
b 1 4
C P S -P a c k e t D is a s s e m b ly S tr u c tu r e (H D L C fo r m a t)
b 1 3
H
A
b 1 2
B
E x p e c te d L I
C R C
b 1 1
Description of Field
C P S -P a c k e t C o u n te r[1 5 :0 ]
b 1 0
L E
H D L C A d d re s s [1 5 :0 ]
b 9
I
H D L C S tre a m N u m b e r[9 :0 ]
S U E
b 8
C irc . B u ffe r R e a d P o in te r[9 :1 ]
C irc . B u ffe r W rite P o in te r[9 :1 ]
R L
b 7
R U
b 6
C o n tro l B y te [7 :0 ]
b 5
b 4
# S e q B its / U U I M
b 3
b 2
Data Sheet
R e s e rv e d
b 1
b 0