mt90502ag2 Zarlink Semiconductor, mt90502ag2 Datasheet - Page 116

• Manufacturer Part Number: mt90502ag2
• Description: Multi-channel Aal2 Sar
• Manufacturer: Zarlink Semiconductor

Address: 10Ch
Label: led0
Reset Value: 007Fh
led_flash_freq[8:0]
led_test_mode
reserved
Address: 16Ch
Label: fastclk_pll_conf0
Reset Value: 0642h
reserved
pll_div_x
pll_div_y
pll_bypass
pll_source
nreset_pll_async
reserved
reserved
Label
Label
7
8
9
10
15:11
Bit Position
Bit Position
Table 41 - Fast Clock PLL Configuration Register 0
15:10
3:1
6:4
0
8:0
9
Table 40 - LED Timing Control Register
WO
WO
WO
WO
WO
Type
Type
RW
RW
WO
WO
WO
RW
Zarlink Semiconductor Inc.
Determines the time in ms that the LEDs will be turned off to
indicate link activity.
If '0', the LED Flashing time will be determined in ms. If '1', the
LED Flashing time will be determined in us.
Reserved. Must always be “0000_00”
MT90502
Reserved. Always read as “0”
Selects the division of the reference before being fed to the
PLL. The reference is either upclk or mem_clk.
Selects the division of the feedback before being fed to the
PLL.
When '1', mem_clk or upclk are passed directly (without being
divided) to fast_clk.
0' = upclk is PLL source; '1' = mem_clk is PLL source.
Active low PLL nreset. This value resets the PLL's clock
divisors.
Reserved. Must write “1”.
Reserved. Always read as “0000_0”
116
Description
Description
Data Sheet