dspic33fj128mc204 Microchip Technology Inc., dspic33fj128mc204 Datasheet - Page 38

• Manufacturer Part Number: dspic33fj128mc204
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

DS70291C-page 36
4.0
The
dsPIC33FJ64MCX02/X04,
dsPIC33FJ128MCX02/X04 architecture features sepa-
rate program and data memory spaces and buses. This
architecture also allows the direct access of program
memory from the data space during code execution.
FIGURE 4-1:
Note:
Note:
dsPIC33FJ32MC302/304
MEMORY ORGANIZATION
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(11264 instructions)
This data sheet summarizes the features
of
dsPIC33FJ64MCX02/X04,
dsPIC33FJ128MCX02/X04
devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “dsPIC33F Family Reference
Manual”, Section 4. “Program Memory”
(DS70203), which is available from the
Microchip website (www.microchip.com).
GOTO Instruction
Unimplemented
Reset Address
User Program
Flash Memory
Memory areas are not shown to scale.
(Read ‘0’s)
Registers
Reserved
DEVID (2)
Reserved
Reserved
Reserved
PROGRAM MEMORY MAP FOR dsPIC33FJ32MC302/304,
dsPIC33FJ64MCX02/X04, AND dsPIC33FJ128MCX02/X04 DEVICES
dsPIC33FJ32MC302/304,
dsPIC33FJ32MC302/304,
families
dsPIC33FJ64MCX02/X04
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(22016 instructions)
Preliminary
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
Reserved
(Read ‘0’s)
Reserved
DEVID (2)
Reserved
Registers
Reserved
and
and
of
4.1
The
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04,
and
instructions. The space is addressable by a 24-bit
value derived either from the 23-bit Program Counter
(PC) during program execution, or from table operation
or data space remapping as described in Section 4.6
“Interfacing Program and Data Memory Spaces”.
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD/TBLWT operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
The memory map for the dsPIC33FJ32MC302/304,
dsPIC33FJ64MCX02/X04,
dsPIC33FJ128MCX02/X04
Figure 4-1.
program
dsPIC33FJ128MCX02/X04
Program Address Space
dsPIC33FJ128MCX02/X04
Alternate Vector Table
address
Interrupt Vector Table
Device Configuration
(44032 instructions)
© 2009 Microchip Technology Inc.
GOTO Instruction
Reset Address
Unimplemented
User Program
Flash Memory
Reserved
(Read ‘0’s)
Registers
Reserved
DEVID (2)
Reserved
Reserved
memory
devices
devices
0x0157FE
0x015800
0x0057FE
0x005800
0x00ABFE
0x00AC00
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x7FFFFE
0x800000
0xF7FFFE
0xF80017
0xF80018
0xFEFFFE
0xFF0000
0xFF0002
0xFFFFFE
0xF80000
space
is
shown
is
of
and
the
4M
in