dspic33fj128mc204 Microchip Technology Inc., dspic33fj128mc204 Datasheet - Page 284

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dspic33fj128mc204

Manufacturer Part Number
dspic33fj128mc204
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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REGISTER 22-7:
REGISTER 22-8:
DS70291C-page 282
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 8-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 8-0
Note 1: On devices without nine analog inputs, all AD1CSSL bits can be selected by user application. However,
Note 1: On devices without nine analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored
PCFG7
R/W-0
R/W-0
CSS7
U-0
U-0
2: CSSx = ANx, where x = 0 through 8.
2: PCFGx = ANx, where x = 0 through 8.
3: PCFGx bits have no effect if ADC module is disabled by setting ADxMD bit in the PMDx register. In this
inputs selected for scan without a corresponding input on device converts V
on ports without a corresponding input on device.
case, all port pins are multiplexed with ANx will be in Digital mode.
Unimplemented: Read as ‘0’
CSS<8:0>: ADC Input Scan Selection bits
1 = Select ANx for input scan
0 = Skip ANx for input scan
Unimplemented: Read as ‘0’
PCFG<8:0>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexor connected to AV
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
PCFG6
R/W-0
R/W-0
CSS6
U-0
U-0
AD1CSSL: ADC1 INPUT SCAN SELECT REGISTER LOW
AD1PCFGL: ADC1 PORT CONFIGURATION REGISTER LOW
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
R/W-0
R/W-0
CSS5
U-0
U-0
PCFG4
R/W-0
R/W-0
CSS4
Preliminary
U-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG3
R/W-0
R/W-0
CSS3
U-0
U-0
PCFG2
R/W-0
R/W-0
CSS2
U-0
U-0
© 2009 Microchip Technology Inc.
REF
(1,2)
x = Bit is unknown
x = Bit is unknown
L
.
PCFG1
R/W-0
R/W-0
CSS1
(1,2, 3)
U-0
U-0
PCFG8
PCFG0
R/W-0
R/W-0
R/W-0
R/W-0
CSS8
CSS0
SS
bit 8
bit 0
bit 8
bit 0

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