dspic33fj128mc204 Microchip Technology Inc., dspic33fj128mc204 Datasheet - Page 239

• Manufacturer Part Number: dspic33fj128mc204
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

20.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules
available
dsPIC33FJ64MCX02/X04, and dsPIC33FJ128MCX02/
X04 device family. The UART is a full-duplex
asynchronous system that can communicate with
peripheral devices, such as personal computers, LIN,
RS-232 and RS-485 interfaces. The module also
supports a hardware flow control option with the UxCTS
and UxRTS pins and also includes an IrDA
and decoder.
The primary features of the UART module are:
• Full-Duplex, 8- or 9-bit Data Transmission through
• Even, Odd or No Parity Options (for 8-bit data)
FIGURE 20-1:
© 2009 Microchip Technology Inc.
Note:
the UxTX and UxRX pins
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
This data sheet summarizes the features
of
dsPIC33FJ64MCX02/X04,
dsPIC33FJ128MCX02/X04
devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “dsPIC33F Family Reference
Manual”,
(DS70188), which is available from the
Microchip website (www.microchip.com).
in
the
the
UART SIMPLIFIED BLOCK DIAGRAM
Section
dsPIC33FJ32MC302/304,
dsPIC33FJ32MC302/304,
Hardware Flow Control
Baud Rate Generator
UART Transmitter
UART Receiver
17.
IrDA
families
®
®
“UART”
encoder
and
Preliminary
of
• One or two stop bits
• Hardware flow control option with UxCTS and
• Fully integrated Baud Rate Generator with 16-bit
• Baud rates ranging from 1 Mbps to 15 bps at 16x
• Baud rates ranging from 4 Mbps to 61 bps at 4x mode
• 4-deep First-In First-Out (FIFO) Transmit Data
• 4-deep FIFO Receive Data buffer
• Parity, framing and buffer overrun error detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive interrupts
• A separate interrupt for all UART error conditions
• Loopback mode for diagnostic support
• Support for sync and break characters
• Support for automatic baud rate detection
• IrDA
• 16x baud clock output for IrDA
A simplified block diagram of the UART module is
shown in Figure 20-1. The UART module consists of
these key hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
UxRTS pins
prescaler
mode at 40 MIPS
at 40 MIPS
buffer
(9th bit = 1)
®
encoder and decoder logic
BCLK
UxRTS
UxCTS
UxRX
UxTX
®
support
DS70291C-page 237