emc166sp16k Emlsi Inc., emc166sp16k Datasheet - Page 53

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emc166sp16k

Manufacturer Part Number
emc166sp16k
Description
1mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
Figure 42. Burst WRITE Row boundary crossing
Note:
1. Non-default BCR settings for burst WRITE at end of row : Fixed or variable latency, WAIT active LOW, WAIT asserted during delay. (shown as
2. WAIT will be assert for LC cycles for variables latency, or LC cycles for fixed latency.
DQ[15:0]
solid line)
UB#/LB#
A[19:0]
ADV#
WAIT
WE#
CLK
CE#
OE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
t
CLK
t
Valid input
SP
t
HD
Valid input
t
t
KTHL
KOH
Valid input
Note 2
End of row
53
t
t
KTHL
KOH
Valid input
EMC166SP16K
1Mx16 CellularRAM
Valid input
Don’t Care

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