emc166sp16k Emlsi Inc., emc166sp16k Datasheet - Page 12

• Manufacturer Part Number: emc166sp16k
• Description: 1mx16 Bit Cellularram
• Manufacturer: Emlsi Inc.

Burst Mode Operation
Burst mode operations enable high-speed synchronous READ and WRITE operations. Burst operations consist of a multi-clock
sequence that must be performed in an ordered fashion. After CE# goes LOW, the address to access is latched on the rising edge of
the next clock that ADV# is LOW. During this first clock rising edge, WE# indicates whether the operation is going to be a READ (WE#
= HIGH, Figure 6) or a WRITE (WE# = LOW, Figure 7).
Figure 6: Burst Mode READ (4-word burst)
Note: Non-default BCR settings for burst mode READ (4-word burst): Fixed or variable latency; Latency code 2 (3 clocks); WAIT active LOW; WAIT
asserted during delay. Diagram in the figure 6 is representative of variable latency with no refresh collision or fixed-latency access.
LB#/UB#
DQ[15:0]
A[19:0]
ADV#
WAIT
WE#
CLK
OE#
CE#
READ Burst Identified
(WE# = HIGH)
Address
Valid
Latency Code 2 (3 clocks)
12
D0
D1
D2
Don’t Care
EMC166SP16K
1Mx16 CellularRAM
D3
Undefined