emc166sp16k Emlsi Inc., emc166sp16k Datasheet - Page 28

• Manufacturer Part Number: emc166sp16k
• Description: 1mx16 Bit Cellularram
• Manufacturer: Emlsi Inc.

Partial Array Refresh (RCR[2:0] Default = Full Array Refresh
The PAR bits restrict refresh operation to a portion of the total memory array. This feature allows the device to reduce standby current
by refreshing only that part of the memory array required by the host system. The refresh options are full array, one-half array, one-
quarter array, one-eighth array, or none of the array. The mapping of these partitions can start at either the beginning or the end of the
address map.
Table 7: Address Patterns for PAR (RCR[4] = 1)
Deep Power-Down (RCR[4]) Default = DPD Disabled
The deep power-down bit enables and disables all refresh-related activity. This mode is used if the system does not require the
storage provided by the CellularRAM device. Any stored data will become corrupted when DPD is enabled. When refresh activity has
been re-enabled, the CellularRAM device will require 150µs to perform an initialization procedure before normal operations can
resume. Deep power-down is enabled by setting RCR[4] = 0 and taking CE# HIGH. DPD can be enabled using CRE or the software
sequence to access the RCR. Taking CE# LOW for at least 10µs disables DPD and sets RCR[4] = 1; it is not necessary to write to the
RCR to disable DPD. BCR and RCR values (other than RCR[4]) are preserved during DPD.
Page Mode Operation (RCR[7]) Default = Disabled
The page mode operation bit determines whether page mode is enabled for asynchronous READ operations. In the power-up default
state, page mode is disabled.
Device Identification Register
The DIDR provides information on the device manufacturer, CellularRAM generation, and the specific device configuration. Table 8
describes the bit fields in the DIDR. This register is read-only. The DIDR is accessed with CRE HIGH and A[19:18] = 01b, or through
the register access software sequence with DQ = 0002h on the third cycle.
Table 8: Device Identification Register Mapping
Field name
Bit Field
RCR[2]
Options
0
0
0
0
1
1
1
1
128 words
RCR[1]
Length
0
0
1
1
0
0
1
1
Row Length
DIDR[15]
RCR[0]
Setting
Bit
0b
0
1
0
1
0
1
0
1
Version
One-quarter of die
One-quarter of die
2nd
One-eighth of die
One-eighth of die
Active Section
DIDR[14:11]
Device version
One-half of die
One-half die
None of die
Full Die
Setting
0001b
Bit
Density
16Mb
Device density
DIDR[10:8]
C0000h-FFFFFh
00000h-FFFFFh
80000h-FFFFFh
E0000h-FFFFFh
Address Space
00000h-7FFFFh
00000h-3FFFFh
00000h-1FFFFh
28
0
Setting
000b
Bit
Generation
CellularRAM generation
CR 1.5
DIDR[7:5]
1 Meg x 16
0 Meg x 16
512 K x 16
256 K x 16
128 K x 16
512 K x 16
256 K x 16
128 K x 16
Size
Setting
010b
Bit
EMC166SP16K
1Mx16 CellularRAM
Vendor
EMLSI
DIDR[4:0]
Vendor ID
Density
16Mb
8Mb
4Mb
2Mb
0Mb
8Mb
4Mb
2Mb
01010b
Setting
Bit