W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 67
W83697HFFDC
Manufacturer Part Number
W83697HFFDC
Description
LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
Manufacturer
Information Storage Devices, Inc
Datasheet
1.W83697HFFDC.pdf
(167 pages)
- Current page: 67 of 167
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5.1.5 Bank0.Reg4 - CIR Control Register (CTR)
Power on default <7:0> = 0010,1001 binary
Table: Low Frequency range select of receiver.
Note that the other non-defined values are reserved.
7-5
4-0
Bit
RX_FSL4~0
00010
00011
00100
00101
00110
00111
01000
01001
01011
01100
01101
01111
10000
10010
10011
10101
10111
11010
11011
11101
RX_FR<2:0>
RX_FSL<4:0>
Name
33.6*
Min.
26.1
28.2
29.4
30.0
31.4
32.1
32.8
34.4
36.2
37.2
38.2
40.3
41.5
42.8
44.1
45.5
48.7
50.4
54.3
001
Read/Write
Read/Write
Read/Write
38.1*
Max.
29.6
32.0
33.3
34.0
35.6
36.4
37.2
39.0
41.0
42.1
43.2
45.7
47.1
48.5
50.0
51.6
55.2
57.1
61.5
Receiver Frequency Range 2~0. These bits select the input
frequency of the receiver ranges. For the input signal, that
is through a band pass filter, i.e., the frequency of the input
signal is located at this defined range then the signal will
be received.
Receiver Frequency Select 4~0. Select the receiver
operation frequency.
RX_FR2~0 (Low Frequency)
- 58 -
Min.
24.7
26.7
27.8
28.4
29.6
30.3
31.0
31.7
32.5
34.2
35.1
36.0
38.1
39.2
40.4
41.7
43.0
46.0
47.6
51.3
010
Max.
31.7
34.3
35.7
36.5
38.1
39.0
39.8
40.8
41.8
44.0
45.1
46.3
49.0
50.4
51.9
53.6
55.3
59.1
61.2
65.9
Description
Publication Release Date: Feb. 2002
W83697HF/F
Min.
23.4
25.3
26.3
26.9
28.1
28.7
29.4
30.1
30.8
32.4
33.2
34.1
36.1
37.2
38.3
39.5
40.7
43.6
45.1
48.6
011
Revision 0.70
Max.
34.2
36.9
38.4
39.3
41.0
42.0
42.9
44.0
45.0
47.3
48.6
49.9
52.7
54.3
56.0
57.7
59.6
63.7
65.9
71.0
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