W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 163

• Manufacturer Part Number: W83697HFFDC
• Description: LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
• Manufacturer: Information Storage Devices, Inc

CRF1 (Default 0x00)
CRF3 (Default 0x00)
CRF4 (Default 0x00)
Bit 7
Bit 6 - 5
Bit 4
Bit 3 - 0
Bit 7~4 : Reserved. Return zero when read.
Bit 3~0 : Device's IRQ status.
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7~4 : Reserved. Return zero when read.
Bit 3~0 : These bits indicate the IRQ status of the individual GPIO function or logical device
Bit 3
Bit 2
Bit 1
Bit 0
: WAK_STS. This bit is set when the chip is in the sleeping state and an enabled resume
event occurs. Upon setting this bit, the sleeping/working state machine will transition the
system to the working state. This bit is only set by hardware and is cleared by writing a 1
to this bit position or by the sleeping/working state machine automatically when the
global standby timer expires.
= 0
= 1
: Devices' trap status.
: Reserved. Return zero when read.
: Devices' trap status.
These bits indicate the IRQ status of the individual device respectively. The device's IRQ
status bit is set by their source device and is cleared by writing a 1. Writing a 0 has no
effect.
: PRTIRQSTS. printer port IRQ status.
: FDCIRQSTS. FDC IRQ status.
: URAIRQSTS. UART A IRQ status.
: URBIRQSTS. UART B IRQ status.
respectively. The status bit is set by their source function or device and is cleared by writing
a1. Writing a 0 has no effect.
: HMIRQSTS. Hardware monitor IRQ status.
: WDTIRQSTS. Watch dog timer IRQ status.
: CIRIRQSTS. Consumer IR IRQ status.
: MIDIIRQSTS. MIDI IRQ status.
the chip is in the sleeping state.
the chip is in the working state.
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Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70