W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 149

• Manufacturer Part Number: W83697HFFDC
• Description: LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
• Manufacturer: Information Storage Devices, Inc

10.5 Logical Device 0 (FDC)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR 61 (Default 0x03, 0xf0 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x06 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR74 (Default 0x02 if PNPCSV = 0 during POR, default 0x04 otherwise)
These two registers select FDC I/O base address [0x100:0xFF8] on 8 byte boundary.
Bit 5
Bit 4
Bit 0~3 : Reserved
Bit 7 - 1 : Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit 3 - 0 : These bits select IRQ resource for FDC.
Bit 7 - 3 : Reserved.
Bit 2 - 0 : These bits select DRQ resource for FDC.
: (PIN 69 ~ 74 & 76 ~77)
= 0
= 1
: (PIN 66 ~ 68 & 95 ~ 97)
= 0
= 1
= 1
= 0
= 000
= 001
= 010
= 011
= 100 -
111
GPIO 4
Fresh IF (XA!5 ~ XA10 & XA7 ~ A0)
GPIO 5(GP52 ~ 57)
Fresh IF(XA18 ~ XA16 , ROMCS#, MEMR #, MEMW#)
Activates the logical device.
Logical device is inactive.
DMA0
DMA1
DMA2
DMA3
No DMA active
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Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70