W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 161

• Manufacturer Part Number: W83697HFFDC
• Description: LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
• Manufacturer: Information Storage Devices, Inc

10.13
CR30 (Default 0x00)
CRE0 (Default 0x00)
CRE 1 (Default 0x00) CIR wake up index register
CRE 2 CIR wake up data register
CRE5 (Default 0x00)
CRE6 (Default 0x00)
CR70 (Default 0x00)
Bit 7
Bit 6 ~ 0 :Compared Code Length . When the compared codes are storage in the data register,
Bit 7 - 1 Reserved.
Bit 0
Bit 7 - 4 : Reserved.
Bit 3 - 0 : These bits select IRQ resources for SMI
Bit7
Bit 5
Bit 6, 4 ~ 0
Bit 7 - 6 : Reserved.
Bit 5 - 0 : CIR Baud Rate Divisor. The clock base of CIR is 32khz, so that the baud rate is 32khz
be read/written.
This register holds the value of wake up key register indicated by CRE1. This register can
The range of CIR wake up index register is 0x20 ~ px2F .
Logical Device A (ACPI)
= 1
= 0
: ENCIRWAKEUP. Enable CIR to wake-up system .
= 0
= 1
: CIR_STS. This bit is cleared by reading 1 this register.
= 0
= 1
divided by ( CIR Baud Rate Divisor + 1).
: Reserved
these data length should be written to this register.
Activates the logical device.
Logical device is inactive.
Disable CIR wake up function
Enable CIR wake up function
Disable
Enable
: Reserved
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PME
Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70