W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 150

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W83697HFFDC

Manufacturer Part Number
W83697HFFDC
Description
LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
Manufacturer
Information Storage Devices, Inc
Datasheet
CRF0 (Default 0x0E)
FDD Mode Register
CRF1 (Default 0x00)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3 - 2 Interface Mode
Bit 1
Bit 0
Bit 7 - 6 : Boot Floppy
Bit 5, 4 : Media ID1, Media ID0. These bits will be reflected on FDC's Tape Drive Register bit 7, 6.
: FIPURDWN
This bit controls the internal pull-up resistors of the FDC input pins RDATA, INDEX, TRAK0,
DSKCHG, and WP.
= 0
= 1
: INTVERTZ
This bit determines the polarity of all FDD interface signals.
= 0
= 1
: DRV2EN (PS2 mode only)
When this bit is a logic 0, indicates a second drive is installed and is reflected in status
register A.
: Swap Drive 0, 1 Mode
= 0
= 1
= 11 AT Mode (Default)
= 10 (Reserved)
= 01 PS/2
= 00 Model 30
: FDC DMA Mode
= 11 Burst Mode is enabled
= 10 Non-Burst Mode (Default)
: Floppy Mode
= 11 Normal Floppy Mode (Default)
= 10 Enhanced 3-mode FDD
= 00 FDD A
= 01 FDD B
= 10 FDD C
= 11 FDD D
The internal pull-up resistors of FDC are turned on.(Default)
The internal pull-up resistors of FDC are turned off.
FDD interface signals are active low.
FDD interface signals are active high.
No Swap (Default)
Drive and Motor select 0 and 1 are swapped.
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Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70

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