mpc8313e Freescale Semiconductor, Inc, mpc8313e Datasheet - Page 26

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mpc8313e

Manufacturer Part Number
mpc8313e
Description
Mpc8313e Powerquicc Ii Pro Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Ethernet: Three-Speed Ethernet, MII Management
Figure 8
Figure 9
26
At recommended operating conditions with LV
RX_CLK clock rise V
RX_CLK clock fall time V
Note:
1. The symbols used for timing specifications herein follow the pattern of t
for inputs and t
receive timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
(K) going to the high (H) state or setup time. Also, t
input signals (D) went invalid (X) relative to the t
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
used with the appropriate letter: R (rise) or F (fall).
provides the AC test load for TSEC.
shows the MII receive AC timing diagram.
(first two letters of functional block)(reference)(state)(signal)(state)
RXD[3:0]
RX_CLK
Parameter/Condition
Figure 9. MII Receive AC Timing Diagram RMII AC Timing Specifications
RX_DV
RX_ER
IL
Output
MPC8313E PowerQUICC
(min) to V
IH
(max) to V
Table 25. MII Receive AC Timing Specifications (continued)
IH
MRX
(max)
IL
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is
t
(min)
t
MRXH
MRDVKH
DDA
Z
/
0
LV
= 50 Ω
Figure 8. TSEC AC Test Load
t
MRX
DDB
MRX
/NV
II Pro Processor Hardware Specifications, Rev. 0
MRDXKL
DD
clock reference (K) going to the low (L) state or hold time. Note that, in
Valid Data
of 3.3 V ± 10%.
symbolizes MII receive timing (GR) with respect to the time data
Symbol
t
MRXF
t
t
MRXR
MRXF
R
for outputs. For example, t
L
(first two letters of functional block)(signal)(state) (reference)(state)
1
= 50 Ω
t
MRDXKH
t
MRXR
Min
1.0
1.0
LV
DDA
/
2 or LV
Typ
MRDVKH
DDB
Freescale Semiconductor
/2
MRX
symbolizes MII
Max
4.0
4.0
clock reference
Unit
ns
ns

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