mpc8313e Freescale Semiconductor, Inc, mpc8313e Datasheet - Page 14

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mpc8313e

Manufacturer Part Number
mpc8313e
Description
Mpc8313e Powerquicc Ii Pro Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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RESET Initialization
5
This section describes the DC and AC electrical specifications for the reset initialization timing and
electrical requirements of the MPC8313E.
5.1
Table 8
5.2
Table 9
14
Required assertion time of HRESET or SRESET (input) to
activate reset flow
Required assertion time of PORESET with stable clock applied
to SYS_CLK_IN when the device is in PCI host mode
Required assertion time of PORESET with stable clock applied
to PCI_SYNC_IN when the device is in PCI agent mode
HRESET/ SRESET assertion (output)
HRESET negation to SRESET negation (output)
Input setup time for POR configuration signals
(CFG_RESET_SOURCE[0:3] and CFG_SYS_CLK_IN_DIV )
with respect to negation of PORESET when the device is in PCI
host mode
Input setup time for POR configuration signals
(CFG_RESET_SOURCE[0:2] and CFG_CLKIN_DIV) with
respect to negation of PORESET when the device is in PCI
agent mode
Input hold time for POR configuration signals with respect to
negation of HRESET
RESET Initialization
provides the DC electrical characteristics for the RESET pins.
Input high voltage
Input low voltage
Input current
Output high voltage
Output low voltage
Output low voltage
provides the reset initialization AC timing specifications.
RESET DC Electrical Characteristics
RESET AC Electrical Characteristics
Characteristic
Parameter/Condition
MPC8313E PowerQUICC
Table 9. RESET Initialization Timing Specifications
Table 8. RESET Pins DC Electrical Characteristics
Symbol
II Pro Processor Hardware Specifications, Rev. 0
V
V
V
V
V
I
OH
OL
IN
OL
IH
IL
0 V ≤ V
I
OH
I
I
OL
OL
Condition
= –8.0 mA
= 3.2 mA
= 8.0 mA
Min
512
IN
32
32
32
16
4
4
0
≤ NV
DD
Max
–0.3
Min
2.0
2.4
NV
DD
Max
t
t
t
t
t
0.8
0.5
0.4
±5
t
t
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
PCI_SYNC_IN
Freescale Semiconductor
SYS_CLK_IN
SYS_CLK_IN
+ 0.3
Unit
ns
Unit
μA
V
V
V
V
V
Notes
1
2
1
1
1
2
1

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