mpc8536e Freescale Semiconductor, Inc, mpc8536e Datasheet - Page 95

• Manufacturer Part Number: mpc8536e
• Description: Mpc8536e Powerquicctm Iii Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

2.20.2.3
With on-chip termination to SnGND (xcorevss), the differential reference clocks inputs are HCSL (High-Speed Current
Steering Logic) compatible DC-coupled.
Many other low voltage differential type outputs like LVDS (Low Voltage Differential Signaling) can be used but may need to
be AC-coupled due to the limited common mode input range allowed (100 to 400 mV) for DC-coupled connection.
LVPECL (Low Voltage Positive Emitter-Coupled Logic) outputs can produce signal with too large amplitude and may need to
be DC-biased at clock driver output first, then followed with series attenuation resistor to reduce the amplitude, in addition to
AC-coupling.
Freescale Semiconductor
SD n _REF_CLK
SD n _REF_CLK
Figure 60. Differential Reference Clock Input DC Requirements (External AC-Coupled)
SD n _REF_CLK
SD n _REF_CLK
Interfacing With Other Differential Signaling Levels
Figure 62
driver chip's internal structure, output impedance and termination requirements are
different between various clock driver chip manufacturers, it is very possible that the clock
circuit reference designs provided by clock driver chip vendor are different from what is
shown below. They might also vary from one vendor to the other. Therefore, Freescale
Semiconductor can neither provide the optimal clock driver reference circuits, nor
guarantee the correctness of the following clock driver connection reference circuits. The
system designer is recommended to contact the selected clock driver chip vendor for the
optimal reference circuits with the MPC8536E SerDes reference clock receiver
requirement provided in this document.
MPC8536E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 2
Figure 61. Single-Ended Reference Clock Input DC Requirements
200mV < Input Amplitude or Differential Peak < 800 mV
to
Figure 65
400 mV < SD n _REF_CLK Input Amplitude < 800 mV
below are for conceptual reference only. Due to the fact that clock
NOTE
Vmin > Vcm – 400 mV
Vmax < Vcm + 400 mV
High-Speed Serial Interfaces
0V
Vcm
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