mpc8536e Freescale Semiconductor, Inc, mpc8536e Datasheet - Page 92

• Manufacturer Part Number: mpc8536e
• Description: Mpc8536e Powerquicctm Iii Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

High-Speed Serial Interfaces
The Differential Input Voltage (or Swing) of the receiver, V
The peak value of the differential transmitter output signal or the differential receiver input signal is defined as Differential Peak
Since the differential output signal of the transmitter and the differential input signal of the receiver each range from A - B to
The Common Mode Voltage is equal to one half of the sum of the voltages between each conductor of a balanced interchange
To illustrate these definitions using real values, consider the case of a CML (Current Mode Logic) transmitter that has a common
mode voltage of 2.25 V and each of its outputs, TD and TD, has a swing that goes between 2.5V and 2.0V. Using these values,
the peak-to-peak voltage swing of each signal (TD or TD) is 500 mV p-p, which is referred as the single-ended swing for each
signal. In this example, since the differential signaling environment is fully symmetrical, the transmitter output’s differential
swing (V
mV and –500 mV, in other words, V
(V
2.20.2
The SerDes reference clock inputs are applied to an internal PLL whose output creates the clock used by the corresponding
SerDes lanes. The SerDes reference clocks for PCI Express are SD1_REF_CLK and, SD1_REF_CLK. The SerDes reference
clocks for the SATA and SGMII interfaces are SD2_REF_CLK and, SD2_REF_CLK.
92
DIFFp
4.
5.
6.
) is 500 mV. The peak-to-peak differential voltage (V
Differential Peak Voltage, V
Differential Peak-to-Peak, V
Common Mode Voltage, V
A Volts
OD
B Volts
) has the same amplitude as each signal’s single-ended swing. The differential output signal ranges between 500
SerDes Reference Clocks
MPC8536E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 2
Figure 57. Differential Voltage Definitions for Transmitter or Receiver
SD n _TX or
SD n _RX
SD n _TX or
SD n _RX
voltages: V
Voltage, V
-(A - B) Volts, the peak-to-peak value of the differential transmitter output signal or the differential
receiver input signal is defined as Differential Peak-to-Peak Voltage, V
2 * |(A - B)| Volts, which is twice of differential swing in amplitude, or twice of the differential
peak. For example, the output differential peak-peak voltage can also be calculated as V
= 2*|V
circuit and ground. In this example, for SerDes output, V
/ 2, which is the arithmetic mean of the two complimentary output voltages within a differential
pair. In a system, the common mode voltage may often differ from one component’s output to the
other’s input. Sometimes, it may be even different between the receiver input and driver output
circuits within the same component. It is also referred as the DC offset in some occasion.
OD
OD
cm
|.
DIFFp
DIFFp-p
DIFFp
is 500 mV in one phase and –500 mV in the other phase. The peak differential voltage
SDn_RX
Differential Peak-Peak Voltage, V
= |A - B| Volts.
- V
SDn_RX.
Differential Swing, V
Differential Peak Voltage, V
ID
The V
DIFFp-p
, is defined as the difference of the two complimentary input
ID
) is 1000 mV p-p.
value can be either positive or negative.
ID
or V
DIFFpp
OD
DIFFp
= 2*V
= A – B
= |A – B|
cm_out
DIFFp
= V
(not shown)
SDn_TX
DIFFp-p
Freescale Semiconductor
V
+ V
cm
= (A + B) / 2
= 2*V
SDn_TX
DIFFp
TX-DIFFp-p
= (A + B)
=