dac1208d650 NXP Semiconductors, dac1208d650 Datasheet - Page 40

no-image

dac1208d650

Manufacturer Part Number
dac1208d650
Description
Dac1208d650 Dual 12-bit Dac; Up To 650 Msps; 2?, 4? Or 8? Interpolating With Jesd204a Interface
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 18.
Default settings are shown highlighted.
Table 19.
Default settings are shown highlighted.
DAC1208D650
Product data sheet
Bit
7
6
2
1
0
Bit
7
6
5
4 to 2
Symbol
SPI_3W
SPI_RST
DF
PD_ALL
GAP_PD
Symbol
NCO_EN
NCO_LP_SEL
INV_SINE_EN
MODE[2:0]
10.15.2.2 Page 0 bit definition detailed description
COMMON register (address 00h) bit description
TXCFG register (address 01h) bit description
Please refer to
values emphasized in bold are the default values.
Table 17
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 14 December 2010
Access
R/W
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W
for a register overview for page 0. In the following tables, all the
2×, 4× or 8× interpolating DAC with JESD204A interface
Value
0
1
0
1
0
1
0
1
0
1
Value
0
1
0
1
0
1
000
001
010
011
100
Description
serial interface bus type
serial interface reset
data format
power-down
internal band gap power-down
Description
NCO
low-power NCO
modulation
x / (sin x) function
4 wire SPI
3 wire SPI
no reset
performs a reset on all registers except 0x00
signed (two’s compliment) format
unsigned format
no action
all circuits (digital and analog) are switched off
no action
internal band gap references are switched off
disabled (the NCO phase is reset to 0)
enabled
NCO may use all 32 bits
NCO frequency and phase given by the five
MSBs of the registers 06h and 08h respectively
disabled
enabled
dual DAC: no modulation
positive upper single sideband up-conversion
positive lower single sideband up-conversion
negative upper single sideband up-conversion
negative lower single sideband up-conversion
DAC1208D650
© NXP B.V. 2010. All rights reserved.
40 of 98

Related parts for dac1208d650