dac1208d650 NXP Semiconductors, dac1208d650 Datasheet - Page 24

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dac1208d650

Manufacturer Part Number
dac1208d650
Description
Dac1208d650 Dual 12-bit Dac; Up To 650 Msps; 2?, 4? Or 8? Interpolating With Jesd204a Interface
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
DAC1208D650
Product data sheet
10.3.2 SPI timing description
The SPI interface can operate at a frequency of up to 15 MHz. The SPI timing is shown in
Figure
The SPI timing characteristics are given in
Table 9.
Symbol
f
t
t
t
t
t
t
SCLK
w(SCLK)
su(SCS_N)
h(SCS_N)
su(SDIO)
h(SDIO)
w(RESET_N)
Fig 14. SPI timing diagram
RESET_N
SCS_N
14.
SCLK
SDIO
SPI timing characteristics
Parameter
SCLK frequency
SCLK pulse width
SCS_N set-up time
SCS_N hold time
SDIO set-up time
SDIO hold time
RESET_N pulse width
All information provided in this document is subject to legal disclaimers.
50 %
50 %
50 %
Rev. 2 — 14 December 2010
t
w(RESET_N)
50 %
2×, 4× or 8× interpolating DAC with JESD204A interface
t
t
su(SCS_N)
su(SDIO)
t
h(SDIO)
Table
Min
-
30
20
20
10
5
30
9.
t
w(SCLK)
DAC1208D650
Typ
-
-
-
-
-
-
-
Max
15
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
t
h(SCS_N)
001aaj813
Unit
MHz
ns
ns
ns
ns
ns
ns
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