dac1208d650 NXP Semiconductors, dac1208d650 Datasheet - Page 28

• Manufacturer Part Number: dac1208d650
• Description: Dac1208d650 Dual 12-bit Dac; Up To 650 Msps; 2?, 4? Or 8? Interpolating With Jesd204a Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
DAC1208D650
Product data sheet
10.8 DAC transfer function
Table 11.
The full-scale output current for each DAC is the sum of the two complementary current
outputs:
The output current depends on the digital input data:
The setting applied to register COMMON bit DF (register 00h[2]; see
register allocation
or a two’s complement input.
Table 12
Table 12.
First interpolation filter
Lower
H(1)
H(2)
H(3)
H(4)
H(5)
Data
0
...
2048
...
4095
I
I
I
IOUTP
O fs
IOUTN
( )
=
=
=
I
shows the output current as a function of the input data, when I
I13/Q13 to I0/Q0
Binary
0000 0000 0000
...
1000 0000 0000
...
1111 1111 1111
IOUTP
I
Inversion filter coefficients
DAC transfer function
I
O fs
O fs
( )
( )
All information provided in this document is subject to legal disclaimers.
×
+
×
⎛
⎝
I
⎛
⎝
map”) defines whether the DAC1208D650 operates with a binary input
IOUTN
DATA
--------------- -
4095 DATA
--------------------------------- -
4095
Rev. 2 — 14 December 2010
4095
–
⎞
⎠
2×, 4× or 8× interpolating DAC with JESD204A interface
Upper
H(9)
H(8)
H(7)
H(6)
-
⎞
⎠
Two’s complement
1000 0000 0000
...
0000 0000 0000
...
0111 1111 1111
DAC1208D650
Value
2
−4
10
−35
401
IOUTnP
0 mA
...
10 mA
...
20 mA
Table 17 “Page 0
© NXP B.V. 2010. All rights reserved.
O(fs)
IOUTnN
20 mA
...
10 mA
...
0 mA
= 20 mA.
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(3)
(4)
(5)