ds3104-se Maxim Integrated Products, Inc., ds3104-se Datasheet - Page 55
ds3104-se
Manufacturer Part Number
ds3104-se
Description
Line Card Timing Ic With Synchronous Ethernet Support
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS3104-SE.pdf
(135 pages)
- Current page: 55 of 135
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Register Map Color Coding
________________________________________________________________________________________ DS3104-SE
ADDR
7A
7B
7C
7D
7E
72
73
74
76
77
78
79
REGISTER
PHASE1
PHASE2
PHLKTO
PHMON
PHLIM1
PHLIM2
PBOFF
FSCR1
FSCR2
FSCR3
INTCR
PROT
Device Identification and Protection
Local Oscillator and Master Clock Configuration
Input Clock Configuration
Input Clock Monitoring
Input Clock Selection
DPLL Configuration
DPLL State
Output Clock Configuration
Frame/Multiframe Sync Configuration
2K8KSRC
RECAL
INDEP
CLEN
FLEN
BIT 7
PHLKTOM[1:0]
NW
—
—
MCPDEN USEMCPD
NALOL
BIT 6
OCN
—
—
—
MONLIM[2:0]
SYNCSRC
BIT 5
—
PHASE3[1:0]
—
1
BIT 4
—
—
—
—
PHASE[15:8]
PHASE[7:0]
PROT[7:0]
8KINV
BIT 3
LOS
—
PHASE2[1:0]
PHLKTO[5:0]
PBOFF[5:0]
8KPUL
COARSELIM[3:0]
BIT 2
GPO
SOURCE[3:0]
—
FINELIM[2:0]
2KINV
BIT 1
OD
PHASE1[1:0]
2KPUL
BIT 0
POL
55
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