ds3104-se Maxim Integrated Products, Inc., ds3104-se Datasheet - Page 116

• Manufacturer Part Number: ds3104-se
• Description: Line Card Timing Ic With Synchronous Ethernet Support
• Manufacturer: Maxim Integrated Products, Inc.

9.
9.1
The DS3104-SE supports the standard instruction codes SAMPLE/PRELOAD, BYPASS, and EXTEST. Optional
public instructions included are HIGHZ, CLAMP, and IDCODE.
contains the following items, which meet the requirements set by the IEEE 1149.1 Standard Test Access Port and
Boundary Scan Architecture:
The TAP has the necessary interface pins, namely JTCLK, JTRST, JTDI, JTDO, and JTMS. Details on these pins
can be found in Table 6-5. Details about the boundary scan architecture and the TAP can be found in IEEE 1149.1-
1990, IEEE 1149.1a-1993, and IEEE 1149.1b-1994.
Figure 9-1. JTAG Block Diagram
________________________________________________________________________________________ DS3104-SE
JTAG Test Access Port and Boundary Scan
JTAG Description
Test Access Port (TAP)
TAP Controller
Instruction Register
10k
JTDI
10k
JTMS
IDENTIFICATION
TEST ACCESS PORT
INSTRUCTION
BOUNDARY
REGISTER
REGISTER
REGISTER
REGISTER
CONTROLLER
BYPASS
DEVICE
SCAN
Bypass Register
Boundary Scan Register
Device Identification Register
JTCLK
10k
JTRST
Figure 9-1
SELECT
TRI-STATE
shows a block diagram. The DS3104-SE
IC8
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