upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 436

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upd78f0103hmca1-5a4-a

Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
E.2 Revision History up to Previous Edition
each edition in which the revision was applied.
436
2nd edition
The following table shows the revision history up to this edition. The “Applied to:” column indicates the chapters of
Edition
Modification of 1.5 Kx1 Series Lineup
Modification of recommended connection for unused RESET pin in Table 2-2 Pin I/O
Circuit Types
Addition of Cautions 1 and 2 to Figure 5-7 Format of Oscillation Stabilization Time
Select Register (OSTS)
Deletion of (7) System wait control register (VSWC) in 5.3 Registers Controlling
Clock Generator
Addition of description for when used as capture register to Interrupt request generation
column in Figure 6-5 Format of 16-Bit Timer Mode Control Register 00 (TMC00)
Modification of Note 1 and correction of Cautions 4 and 5 in Figure 6-8 Format of
Prescaler Mode Register 00 (PRM00)
Modification of set value of TMC00 in Figure 6-32 Timing of One-Shot Pulse Output
Operation with Software Trigger
Modification of Note in Figure 7-4 Format of Timer Clock Selection Register 50
(TCL50)
Modification of Note 1 in Figure 8-5 Format of 8-Bit Timer H Mode Register 0
(TMHMD0)
Modification of Note in Figure 8-6 Format of 8-Bit Timer H Mode Register 1
(TMHMD1)
Correction of Table 9-1 Loop Detection Time of Watchdog Timer
Modification of Note 1 in Figure 11-4 Format of Baud Rate Generator Control
Register 0 (BRGC0)
Modification of Note 1 in Figure 12-8 Format of Clock Selection Register 6 (CKSR6)
Modification of (h) SBF transmission in 12.4.2 Asynchronous serial interface (UART)
mode
Modification of Note in Figure 13-3 Format of Serial Clock Selection Register 10
(CSIC10)
Modification of Caution 3 in Figure 14-2 Format of Interrupt Request Flag Register
(IF0L, IF0H, IF1L)
Addition of Cautions 1 and 2 in Figure 15-2 Format of Oscillation Stabilization Time
Select Register (OSTS)
Modification of Figure 16-1 Block Diagram of Reset Function
Modification of Note in Figure 19-3 Format of Low-Voltage Detection Level Selection
Register (LVIS)
Modification of Figure 21-10 FLMD1 Pin Connection Example
Addition of description to 21.5.7 Power supply
APPENDIX E REVISION HISTORY
User’s Manual U16846EJ3V0UD
Description
CHAPTER 1 OUTLINE
CHAPTER 2 PIN
FUNCTIONS
CHAPTER 5 CLOCK
GENERATOR
CHAPTER 6 16-BIT
TIMER/EVENT
COUNTER 00
CHAPTER 7 8-BIT
TIMER/EVENT
COUNTER 50
CHAPTER 8 8-BIT
TIMERS H0 AND H1
CHAPTER 9
WATCHDOG TIMER
CHAPTER 11 SERIAL
INTERFACE UART0
(
78F0103H ONLY)
CHAPTER 12 SERIAL
INTERFACE UART6
CHAPTER 13 SERIAL
INTERFACE CSI10
CHAPTER 14
INTERRUPT
FUNCTIONS
CHAPTER 15
STANDBY FUNCTION
CHAPTER 16 RESET
FUNCTION
CHAPTER 19 LOW-
VOLTAGE DETECTOR
CHAPTER 21 FLASH
MEMORY
µ
PD78F0102H AND
Applied to:
(1/2)

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