upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 419

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

Main clock
High-speed
system clock
oscillator
Prescaler
Internal
oscillator
CPU clock
Function
Details of Function
MOC: Main OSC
control register
OSTC: Oscillation
stabilization time
counter status
register
OSTS: Oscillation
stabilization time
select register
Crystal/ceramic
oscillator
External RC
oscillator
−
Make sure that bit 1 (MCS) of the main clock mode register (MCM) is 0 before setting
MSTOP.
Waiting for the oscillation stabilization time is not required when the external RC oscillation
clock is selected as the high-speed system clock by the option byte. Therefore, the CPU
clock can be switched without reading the OSTC value.
After the above time has elapsed, the bits are set to 1 in order from MOST11 and remain 1. p. 88
If the STOP mode is entered and then released while the internal oscillation clock is being
used as the CPU clock, set the oscillation stabilization time as follows.
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time set by OSTS
The oscillation stabilization time counter counts up to the oscillation stabilization time set by
OSTS. Note, therefore, that only the status up to the oscillation stabilization time set by
OSTS is set to OSTC after STOP mode is released.
The wait time when STOP mode is released does not include the time after STOP mode
release until clock oscillation starts (“a” below) regardless of whether STOP mode is
released by RESET input or interrupt generation.
To set the STOP mode when the high-speed system clock is used as the CPU clock, set
OSTS before executing a STOP instruction.
Execute the OSTS setting after confirming that the oscillation stabilization time has elapsed
as expected in OSTC.
If the STOP mode is entered and then released while the internal oscillation clock is being
used as the CPU clock, set the oscillation stabilization time as follows.
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time set by OSTS
The oscillation stabilization time counter counts up to the oscillation stabilization time set by
OSTS. Note, therefore, that only the status up to the oscillation stabilization time set by
OSTS is set to OSTC after STOP mode is released.
The wait time when STOP mode is released does not include the time after STOP mode
release until clock oscillation starts (“a” below) regardless of whether STOP mode is
released by RESET input or interrupt generation.
When using the crystal/ceramic oscillator, wire as follows in the area enclosed by the
broken lines in the Figure 5-8 to avoid an adverse effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating current flows.
• Always make the ground point of the oscillator capacitor the same potential as V
• Do not fetch signals from the oscillator.
When using the external RC oscillator, wire as follows in the area enclosed by the broken
lines in Figure 5-10 to avoid an adverse effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines. Do not route the wiring near a signal
• Always make the ground point of the oscillator capacitor the same potential as V
• Do not fetch signals from the oscillator.
When the internal oscillation clock is selected as the clock supplied to the CPU, the prescaler
generates various clocks by dividing the internal oscillator output (f
The RSTOP setting is valid only when “Can be stopped by software” is set for the internal
oscillator by the option byte.
To calculate the maximum time, set f
Setting the following values is prohibited when the CPU operates on the internal oscillation
clock.
• PCC2, PCC1, PCC0 = 0, 1, 0
• PCC2, PCC1, PCC0 = 0, 1, 1
• PCC2, PCC1, PCC0 = 1, 0, 0
not ground the capacitor to a ground pattern through which a high current flows.
line through which a high fluctuating current flows.
not ground the capacitor to a ground pattern through which a high current flows.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16846EJ3V0UD
R
= 120 kHz.
Cautions
X
= 240 kHz (TYP.)).
SS
SS
. Do
. Do
p. 87
p. 87
p. 88
p. 88
p. 89
p. 89
p. 89
p. 89
p. 90
p. 92
p. 94
p. 98
p. 99
p. 99
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