upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 314
upd78f0103hmca1-5a4-a
Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0103HMCA1-5A4-A.pdf
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automatically starts at the end of the high-speed system clock oscillation stabilization time. Monitoring is stopped in
STOP mode and during the oscillation stabilization time.
speed system clock is stopped, monitoring automatically starts at the end of the high-speed system clock oscillation
stabilization time. Monitoring is stopped when oscillation of the high-speed system clock is stopped and during the
oscillation stabilization time.
314
Internal oscillation clock
Internal oscillation clock
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to 1 before entering STOP mode, monitoring
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to 1 before or while oscillation of the high-
(CLME = 1 is set when CPU clock operates on internal oscillation clock and before entering STOP mode)
Clock monitor status
Clock monitor status
CPU operation
CPU operation
(6) Clock monitor status after high-speed system clock oscillation is stopped by software
system clock
system clock
(CPU clock)
High-speed
High-speed
MSTOP
CLME
CLME
operation
Monitoring
Normal
Monitoring
(5) Clock monitor status after STOP mode is released
Figure 17-3. Timing of Clock Monitor (3/4)
Oscillation
Monitoring
Monitoring
Oscillation
stopped
stopped
stopped
stopped
STOP
CHAPTER 17 CLOCK MONITOR
User’s Manual U16846EJ3V0UD
Normal operation (internal oscillation clock)
Oscillation stabilization time
Oscillation stabilization time
(time set by OSTS register)
(time set by OSTS register)
Monitoring stopped
Clock supply
Monitoring stopped
17 clocks
stopped
Normal operation
Monitoring
Monitoring
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