upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 245
upd78f0103hmca1-5a4-a
Manufacturer Part Number
upd78f0103hmca1-5a4-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0103HMCA1-5A4-A.pdf
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1. Stop bit length: 1
2. Stop bit length: 2
(c) Normal transmission
The T
register 6 (ASIM6) is set to 1.
Transmission can be started by writing transmit data to transmit buffer register 6 (TXB6). The start bit, parity
bit, and stop bit are automatically appended to the data.
When transmission is started, the data in TXB6 is transferred to transmit shift register 6 (TXS6). After that,
the data is sequentially output from TXS6 to the T
and stop bit set by ASIM6 are added and a transmission completion interrupt request (INTST6) is generated.
Transmission is stopped until the data to be transmitted next is written to TXB6.
Figure 12-15 shows the timing of the transmission completion interrupt request (INTST6). This interrupt
occurs as soon as the last stop bit has been output.
T
T
X
X
D6 (output)
D6 (output)
X
INTST6
INTST6
D6 pin outputs a high level when bit 7 (POWER6) of asynchronous serial interface operation mode
Figure 12-15. Normal Transmission Completion Interrupt Request Timing
Start
Start
CHAPTER 12 SERIAL INTERFACE UART6
D0
D0
If bit 6 (TXE6) of ASIM6 is then set to 1, transmission is enabled.
User’s Manual U16846EJ3V0UD
D1
D1
D2
D2
X
D6 pin. When transmission is completed, the parity bit
D6
D6
D7
D7
Parity
Parity
Stop
Stop
245
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