upd78f0103hmca1-5a4-a Renesas Electronics Corporation., upd78f0103hmca1-5a4-a Datasheet - Page 297

• Manufacturer Part Number: upd78f0103hmca1-5a4-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(b) Release by RESET input
High-speed system clock
Internal oscillation
When the RESET signal is input, HALT mode is released, and then, as in the case with a normal reset
operation, the program is executed after branching to the reset vector address.
Note Waiting for the oscillation stabilization time is not required when the external RC oscillation clock is
Remarks 1. f
×: Don’t care
Maskable interrupt request
RESET input
RESET signal
Status of CPU
RESET signal
Status of CPU
selected as the high-speed system clock by the option byte. Therefore, the CPU clock can be
switched without reading the OSTC value.
Release Source
clock
2. f
Table 15-3. Operation in Response to Interrupt Request in HALT Mode
XP
R
: Internal oscillation clock frequency
: High-speed system clock oscillation frequency
(Internal oscillation
Operating mode
(1) When high-speed system clock is used as CPU clock
(2) When internal oscillation clock is used as CPU clock
Operating mode
clock)
Figure 15-4. HALT Mode Release by RESET Input
system clock)
(High-speed
instruction
MK××
HALT
CHAPTER 15 STANDBY FUNCTION
instruction
0
0
0
0
0
1
−
HALT
Oscillates
User’s Manual U16846EJ3V0UD
Oscillates
PR××
HALT mode
0
0
1
1
1
×
−
HALT mode
IE
0
1
0
×
1
×
×
Oscillation
ISP
stopped
period
×
×
1
0
1
×
×
Reset
Oscillation
stopped
period
Reset
Next address instruction execution
Interrupt servicing execution
Next address instruction execution
Interrupt servicing execution
HALT mode held
Reset processing
Operation
stopped
(17/f
Oscillation stabilization time
Operation
stopped
(17/f
(2
R
)
Oscillates
11
R
/f
)
XP
Oscillates
Operation
to 2
(Internal oscillation clock)
(Internal oscillation clock)
Operating mode
16
/f
XP
Operating mode
)
Note
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