upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 438
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(2) Low-voltage detection level selection register (LVIS)
(3) Port mode register 12 (PM12)
438
Address: FFBFH
Symbol
This register selects the low-voltage detection level.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation input sets LVIS to 00H.
When using the P120/INTP0 pin for external low-voltage detection potential input, set PM120 to 1. At this time,
the output latch of P120 may be 0 or 1.
PM12 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PM12 to FFH.
LVIS
Address: FF2CH
Symbol
PM12
Cautions 1. Be sure to clear bits 1 to 7 to 0.
LVIS0
Figure 17-3. Format of Low-Voltage Detection Level Selection Register (LVIS)
0
1
7
0
PM12n
After reset: 00H
7
1
0
1
2. Do not change the value of LVIS during LVI operation.
V
V
After reset: FFH
LVI0
LVI1
6
0
(4.24 V ±0.1 V)
(4.09 V ±0.1 V)
Output mode (output buffer on)
Input mode (output buffer off)
Figure 17-4. Format of Port Mode Register 12 (PM12)
6
1
CHAPTER 17 LOW-VOLTAGE DETECTOR
R/W
5
0
Preliminary User’s Manual U19014EJ1V0UD
R/W
5
1
P12n pin I/O mode selection (n = 0 to 2)
4
0
4
1
Detection level
3
0
3
1
2
0
PM122
2
1
0
PM121
1
LVIS0
0
PM120
0
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