upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 323
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(2) UF0 EP0 length register (UF0E0L)
UF0E0L
Bit position
The UF0E0L register stores the data length held by the UF0E0R register.
This register is read-only, in 8-bit units. A write access to this register is ignored.
The UF0E0L register always updates the length of the received data while it is receiving data. If the final
transfer is abnormal reception, the UF0E0L register is cleared to 0 and the interrupt request is not generated.
The interrupt request is generated only when the reception is normal, and the FW can read as many data from
the UF0E0R register as the value read from the UF0E0L register. The value of the UF0E0L register is
decremented each time the UF0E0R register has been read.
Status of UF0E0R
UF0EPS0
7 to 0
UF0E0N register
UF0IS1
EP0NKR bit of
E0ODT
EP0R
E0L7
7
register
register
register
bit of
bit of
E0L7 to E0L0
Bit name
E0L6
6
CHAPTER 12 USB FUNCTION CONTROLLER (USBF)
E0L5
These bits store the data length held by the UF0E0R register.
5
Figure 12-2. Operation of UF0E0R Register
of reception
completion
Normal
Preliminary User’s Manual U19014EJ1V0UD
E0L4
Reading
4
starts
FIFO
E0L3
3
completed
Reading
FIFO
E0L2
2
Hardware clear
Hardware clear
Hardware clear
Function
E0L1
1
Abnormal
reception
E0L0
0
hard-
FIFO
ware
clear
Address
FF76H
of reception
completion
Normal
After reset
00H
323
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