upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 415
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(b) Release by reset signal generation
When the reset signal is generated, HALT mode is released, and then, as in the case with a normal reset
operation, the program is executed after branching to the reset vector address.
Remark f
Internal high-speed
(X1 oscillation)
Status of CPU
oscillation clock
system clock
Reset signal
Status of CPU
High-speed
Reset signal
X
: X1 clock oscillation frequency
(2) When internal high-speed oscillation clock is used as CPU clock
(1) When high-speed system clock is used as CPU clock
Normal operation
(internal high-speed
Normal operation
system clock)
oscillation clock)
(high-speed
Figure 14-4. HALT Mode Release by Reset
instruction
CHAPTER 14 STANDBY FUNCTION
Oscillates
Preliminary User’s Manual U19014EJ1V0UD
HALT
instruction
Oscillates
HALT
HALT mode
HALT mode
Oscillation
Starting X1 oscillation is
stopped
period
Reset
specified by software.
Oscillation
stopped
period
Reset
accuracy stabilization
Wait for oscillation
(20 s (TYP.))
Oscillation
processing
stopped
Reset
µ
(20 s (TYP.))
processing
Reset
µ
Oscillation stabilization time
(internal high-speed
Oscillates
(internal high-speed
Normal operation
Normal operation
oscillation clock)
oscillation clock)
(2
Oscillates
11
/f
X
to 2
16
/f
X
)
415
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