upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 332
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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(7) UF0 bulk in 1 register (UF0BI1)
UF0BI1
Bit position
The UF0BI1 register is a 64-byte × 2 FIFO that stores data for Endpoint1. This register consists of two banks
of 64-byte FIFOs each of which performs a toggle operation and repeatedly connects the buses on the SIE and
CPU sides. The toggle operation takes place when no data is in the FIFO on the SIE side (counter value = 0)
and when the FIFO on the CPU side is correctly written (FIFO full or BKI1DED bit = 1).
This register is write-only, in 8-bit units. When this register is read, 00H is read.
The hardware transmits data to the USB bus in synchronization with the IN token for Endpoint1 only when the
BKI1NK bit of the UF0EN register is set to 1 (when NAK is not transmitted). The address at which data is to be
written or read is managed by the hardware. Therefore, FW can transmit data to the host only by writing the
data to the UF0BI1 register sequentially. A short packet is transmitted when data is written to the UF0BI1
register and the BKI1DED bit of the UF0DEND register is set to 1 (BKIN1 bit of UF0EPS0 register = 1 (data
exists)). A Null packet is transmitted when the UF0BI1 register is cleared and the BKI1DED bit of the
UF0DEND register is set to 1 (BKIN1 bit of the UF0EPS0 register = 1 (data exists)). When the register
correctly transmits the data, a FIFO toggle operation occurs. As a result, the BKI1DT bit of the UF0IS2 register
is set to 1, and an interrupt request is issued to the CPU.
The operation of the UF0BI1 register is illustrated below.
7 to 0
BKI17
7
BKI17 to
BKI10
Bit name
BKI16
6
CHAPTER 12 USB FUNCTION CONTROLLER (USBF)
BKI15
These bits store data for Endpoint1.
5
Preliminary User’s Manual U19014EJ1V0UD
BKI14
4
BKI13
3
BKI12
2
Function
BKI11
1
BKI10
0
Address
FF0EH
After reset
Undefined
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