upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 409
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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14.1 Standby Function and Configuration
14.1.1 Standby function
available.
(1) HALT mode
(2) STOP mode
set are held. The I/O port output latches and output buffer statuses are also held.
14.1.2 Registers controlling standby function
The standby function is designed to reduce the operating current of the system. The following two modes are
In either of these two modes, all the contents of registers, flags and data memory just before the standby mode is
Caution When shifting to the STOP mode, be sure to stop the peripheral hardware operation operating
The standby function is controlled by the following two registers.
• Oscillation stabilization time counter status register (OSTC)
• Oscillation stabilization time select register (OSTS)
Remark For the registers that start, stop, or select the clock, see CHAPTER 5 CLOCK GENERATOR.
HALT instruction execution sets the HALT mode. In the HALT mode, the CPU operation clock is stopped. If the
high-speed system clock oscillator, internal high-speed oscillator, or internal low-speed oscillator is operating
before the HALT mode is set, oscillation of each clock continues. In this mode, the operating current is not
decreased as much as in the STOP mode, but the HALT mode is effective for restarting operation immediately
upon interrupt request generation and carrying out intermittent operations frequently.
STOP instruction execution sets the STOP mode. In the STOP mode, the high-speed system clock oscillator and
internal high-speed oscillator stop, stopping the whole system, thereby considerably reducing the CPU operating
current.
Because this mode can be cleared by an interrupt request, it enables intermittent operations to be carried out.
However, because a wait time is required to secure the oscillation stabilization time after the STOP mode is
released when the X1 clock is selected, select the HALT mode if it is necessary to start processing immediately
upon interrupt request generation.
with main system clock before executing STOP instruction.
CHAPTER 14 STANDBY FUNCTION
Preliminary User’s Manual U19014EJ1V0UD
409
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