upd78f0730 Renesas Electronics Corporation., upd78f0730 Datasheet - Page 252
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upd78f0730
Manufacturer Part Number
upd78f0730
Description
8-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0730.pdf
(518 pages)
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Therefore, the maximum receivable baud rate at the transmission destination is as follows.
Similarly, the maximum permissible data frame length can be calculated as follows.
Therefore, the minimum receivable baud rate at the transmission destination is as follows.
The permissible baud rate error between UART6 and the transmission destination can be calculated from the
above minimum and maximum baud rate expressions, as follows.
Remarks 1. The permissible error of reception depends on the number of bits in one frame, input clock
10
11
8
20
50
100
255
Minimum permissible data frame length: FLmin = 11 × FL −
× FLmax = 11 × FL −
Division Ratio (k)
FLmax =
BRmax = (FLmin/11)
BRmin = (FLmax/11)
2. k: Set value of BRGC6
frequency, and division ratio (k). The higher the input clock frequency and the higher the division
ratio (k), the higher the permissible error.
21k – 2
20k
Table 10-6. Maximum/Minimum Permissible Baud Rate Error
FL × 11
k + 2
2 × k
Maximum Permissible Baud Rate Error
−
−
× FL =
1
1
CHAPTER 10 SERIAL INTERFACE UART6
=
=
21k + 2
21k − 2
22k
Preliminary User’s Manual U19014EJ1V0UD
20k
21k − 2
+3.53%
+4.26%
+4.56%
+4.66%
+4.72%
2 × k
Brate
Brate
FL
k − 2
2k
× FL =
Minimum Permissible Baud Rate Error
21k + 2
2k
−3.61%
−4.31%
−4.58%
−4.67%
−4.73%
FL
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