DSP56F807 Motorola Inc, DSP56F807 Datasheet - Page 39

• Manufacturer Part Number: DSP56F807
• Description: 56F807 16-bit Hybrid Processor
• Manufacturer: Motorola Inc

Operating Conditions:
3.14 JTAG Timing
56F807 Technical Data
TCK frequency of operation
TCK cycle time
TCK clock pulse width
TMS, TDI data set-up time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
DE assertion time
1.
T = 12.5ns.
2.
3.
(Input)
TCK
Timing is both wait state and frequency dependent. For the values listed, T = clock cycle. For 80MHz operation,
TCK frequency of operation must be less than 1/8 the processor rate.
Parameters listed are guaranteed by design.
V
M
= V
IL
+ (V
Characteristic
IH
V
– V
SS
Figure 31. Test Clock Input Timing Diagram
2
= V
IL
Freescale Semiconductor, Inc.
)/2
SSA
V
For More Information On This Product,
IH
= 0 V, V
Table 37. JTAG Timing
Go to: www.freescale.com
DD
= V
DDA
t
PW
V
V
M
IL
= 3.0–3.6 V, T
Symbol
t
CY
t
TRST
t
f
t
t
t
t
t
t
PW
OP
DH
CY
DS
DV
TS
DE
A
= –40 to +85 C, C
1, 3
t
PW
V
Min
100
DC
0.4
1.2
4T
50
—
—
50
M
L
50pF, f
Max
26.6
23.5
10
—
—
—
—
—
—
OP
= 80MHz
JTAG Timing
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
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