DSP56F807 Motorola Inc, DSP56F807 Datasheet - Page 28

• Manufacturer Part Number: DSP56F807
• Description: 56F807 16-bit Hybrid Processor
• Manufacturer: Motorola Inc

Operating Conditions:
28
Note: During read-modify-write instructions and internal instructions, the address lines do not change state.
Address Valid to Input Data Valid
Wait states = 0
Wait states > 0
Address Valid to RD Asserted
RD Asserted to Input Data Valid
Wait states = 0
Wait states > 0
WR Deasserted to RD Asserted
RD Deasserted to RD Asserted
WR Deasserted to WR Asserted
RD Deasserted to WR Asserted
(See Note)
A0–A15,
1.
T = Clock Period. For 80MHz operation, T = 12.5ns.
2.
To calculate the required access time for an external memory for any frequency < 80MHz, use this formula:
Top = Clock period @ desired operating frequency
WS = Number of wait states
Memory Access Time = (Top*WS) + (Top- 11.5)
D0–D15
PS, DS
Timing is both wait state and frequency dependent. In the formulas listed, WS = the number of wait states and
Parameters listed are guaranteed by design.
WR
RD
Table 29. External Bus Asynchronous Timing
Characteristic
t
AWR
t
WRWR
V
Figure 13. External Bus Asynchronous Timing
t
WRD
SS
= V
Freescale Semiconductor, Inc.
SSA
For More Information On This Product,
t
= 0 V, V
DOS
t
WR
Go to: www.freescale.com
DD
Data Out
= V
DDA
t
ARDA
Symbol
t
t
t
t
t
WRWR
t
WRRD
RDWR
= 3.0–3.6 V, T
t
RDRD
ARDA
WRRD
t
RDD
AD
t
DOH
t
AD
A
= –40 to +85 C, C
t
ARDD
t
14.1
12.8
Min
-4.4
RD
6.8
—
—
—
—
0
Data In
1,2
t
(Continued)
RDD
L
t
t
RDRD
RDWR
(T*WS) + 2.4
50pF, f
(T*WS)+1
56F807 Technical Data
Max
2.4
—
—
—
—
—
1
t
op
t
DRD
RDA
= 80MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns