DSP56F807 Motorola Inc, DSP56F807 Datasheet - Page 12

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DSP56F807

Manufacturer Part Number
DSP56F807
Description
56F807 16-bit Hybrid Processor
Manufacturer
Motorola Inc
Datasheet

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2.8 Serial Peripheral Interface (SPI) Signals
12
No. of
No. of
Pins
Pins
1
1
1
1
3
4
Table 12. Pulse Width Modulator (PWMA and PWMB) Signals (Continued)
FAULTB0-3
GPIOE6
GPIOE5
GPIOE4
GPIOE7
Signal
Name
SCLK
MISO
MOSI
ISB0-2
Signal
SS
Name
Input/Outp
Input/Outp
Input/Outp
Input/Outp
Input/Outp
Table 13. Serial Peripheral Interface (SPI) Signals
Signal
Output
Output
Input/
Input/
Type
Input
(Schmitt)
(Schmitt)
ut
ut
ut
ut
ut
Signal
Type
Input
Input
Freescale Semiconductor, Inc.
For More Information On This Product,
State During
State During
Reset
Input
Input
Input
Input
Input
Input
Input
Input
Reset
Input
Input
Go to: www.freescale.com
SPI Master In/Slave Out (MISO)—This serial data pin is an
input to a master device and an output from a slave device. The
MISO line of a slave device is placed in the high-impedance
state if the slave device is not selected.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
After reset, the default state is MISO.
SPI Master Out/Slave In (MOSI)—This serial data pin is an
output from a master device and an input to a slave device. The
master device places data on the MOSI line a half-cycle before
the clock edge that the slave device uses to latch the data.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
After reset, the default state is MOSI.
SPI Serial Clock—In master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves
as the data clock input.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
After reset, the default state is SCLK.
SPI Slave Select—In master mode, this pin is used to arbitrate
multiple masters. In slave mode, this pin is used to select the
slave.
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
After reset, the default state is SS.
ISB0-2— These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMB.
FAULTB0-3— These four Fault input pins are used for
disabling selected PWMB outputs in cases where fault
conditions originate off-chip.
Signal Description
Signal Description
56F807 Technical Data

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