DSP56F807 Motorola Inc, DSP56F807 Datasheet - Page 37

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DSP56F807

Manufacturer Part Number
DSP56F807
Description
56F807 16-bit Hybrid Processor
Manufacturer
Motorola Inc
Datasheet

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3.12 Analog-to-Digital Converter (ADC) Characteristics
Operating Conditions:
performance), ADC clock = 4MHz, 3.0–3.6 V, T
56F807 Technical Data
ADC input voltages
Resolution
Integral Non-Linearity
Differential Non-Linearity
Monotonicity
ADC internal clock
Conversion range
Conversion time
Sample time
Input capacitance
Gain Error (transfer gain)
Total Harmonic Distortion
Offset Voltage
Signal-to-Noise plus Distortion
Effective Number of Bits
Spurious Free Dynamic Range
Bandwidth
ADC Quiescent Current (each dual ADC)
V
REF
1.
to a digital output code of 0.
2.
to V
3.
4.
5.
6.
Quiescent Current (each dual ADC)
DDA
For optimum ADC performance, keep the minimum V
V
Measured in 10-90% range.
LSB = Least Significant Bit.
Guaranteed by characterization.
t
AIC
REF
-0.3V.
= 1/
must be equal to or less than V
5
Characteristic
f
ADIC
5
3
V
5
SS
5
5
= V
Freescale Semiconductor, Inc.
5
SSA
5
For More Information On This Product,
= 0 V, V
Table 35. ADC Characteristics
DDA
Go to: www.freescale.com
A
DD
= –40 to +85 C, C
and must be greater than 2.7V. For optimal ADC performance, set V
= V
V
Symbol
V
SINAD
DDA
ENOB
E
SFDR
OFFSET
I
f
DNL
t
t
C
THD
I
ADCIN
R
R
VREF
INL
ADIC
BW
ADC
ADC
ADS
GAIN
ADI
ES
AD
= 3.0–3.6 V, V
ADCIN
Analog-to-Digital Converter (ADC) Characteristics
L
V
0.93
value > 25mV. Inputs less than 25mV may convert
Min
-90
0.5
0
12
60
55
65
SSA
50pF, f
9
1
REF
= V
OP
GUARANTEED
DD
= 80MHz
+/- 2.5
+/- 0.9
-0.3V, ADCDIV = 4, 9, or 14, (for optimal
1.00
Typ
100
-25
64
60
10
70
50
12
6
1
5
V
V
+/- 4
+/- 1
Max
1.08
16.5
+10
REF
12
DDA
5
2
t
t
AIC
AIC
LSB
LSB
MHz
Unit
KHz
Bits
pF
mV
mA
mA
cycles
cycles
dB
bit
V
V
REF
6
4
4
6
6
37

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