MT93L04AG Zarlink Semiconductor, MT93L04AG Datasheet - Page 9

• Manufacturer Part Number: MT93L04AG
• Description: Description = 128-Channel Voice Echo CANceller ;; Package Type = Bga ;; No. Of Pins = 365
• Manufacturer: Zarlink Semiconductor

Preliminary Information
Pin Description (continued)
IRQB_d2
CSB_d2
R/WB_d2
DTAB_d2
D(2)_d2
D(3)_d2
A(0)_d2
A(1)_d2
A(5)_d2
A(6)_d2
A(9)_d2
A_IC1_d2
A_IC2_d2
DSB_d2
D(0)_d2
D(1)_d2
D(4)_d2
D(5)_d2
D(6)_d2
D(7)_d2
A(2)_d2
A(3)_d2
A(4)_d2
A(7)_d2
A(8)_d2
A(10)_d2
Signal Name
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
ICO
ICO
Signal Type
BGA Ball #
W10
U10
T10
V10
Y10
W5
W6
W7
W8
W9
U5
Y5
V6
U6
Y6
V7
Y7
Y8
V8
U9
V9
Y9
U8
T9
T8
T7
Interrupt Request (Open Drain Output). This
output goes low when an interrupt occurs in any
channel. IRQ returns high when all the interrupts
have been read from the Interrupt FIFO Register.
A pull-up resistor (1K typical) is required at this
output.
Data Strobe (Input). This active low input works
in conjunction with CS to enable the read and
write operations.
Chip Select (Input). This active low input is used
by a microprocessor to activate the
microprocessor port.
Read/Write (Input). This input controls the
direction of the data bus lines (D7-D0) during a
microprocessor access.
Data Transfer Acknowledgment (Open Drain
Output). This active low output indicates that a
data bus transfer is completed. A pull-up resistor
(1K typical) is required at this output.
Data Bus D0 - D7 (Bidirectional). These pins
form the 8-bit bidirectional data bus of the
microprocessor port.
Address A0 to A10 (Input). These inputs provide
the A10 - A0 address lines to the internal
registers.
Internal Connection. Connected to VSS for
normal operation
Internal Connection. Connected to VSS for
normal operation
Signal Description
MT93L04A
9