MT93L04AG Zarlink Semiconductor, MT93L04AG Datasheet - Page 13

• Manufacturer Part Number: MT93L04AG
• Description: Description = 128-Channel Voice Echo CANceller ;; Package Type = Bga ;; No. Of Pins = 365
• Manufacturer: Zarlink Semiconductor

Preliminary Information
Pin Description (continued)
IRQB_d3
CSB_d3
R/WB_d3
B_d3
D(2)_d3
D(3)_d3
A(0)_d3
A(1)_d3
A(5)_d3
A(6)_d3
A(9)_d3
A_IC1_d3
A_IC2_d3
DSB_d3
D(0)_d3
D(1) _d3
D(4)_d3
D(5)_d3
D(6)_d3
D(7)_d3
A(2)_d3
A(3)_d3
A(4)_d3
A(7)_d3
A(8)_d3
A(10)_d3
Signal Name
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
ICO
ICO
Signal Type
BGA Ball #
W16
W17
W18
W19
W20
Y16
Y17
V15
Y18
Y19
V16
Y20
V17
V18
U18
V19
V20
U19
U20
R18
R17
R19
P18
T18
T19
T20
Interrupt Request (Open Drain Output). This
output goes low when an interrupt occurs in any
channel. IRQ returns high when all the interrupts
have been read from the Interrupt FIFO Register.
A pull-up resistor (1K typical) is required at this
output.
Data Strobe (Input). This active low input works
in conjunction with CS to enable the read and
write operations.
Chip Select (Input). This active low input is used
by a microprocessor to activate the
microprocessor port.
Read/Write (Input). This input controls the
direction of the data bus lines (D7-D0) during a
microprocessor access.
Data Transfer Acknowledgment (Open Drain
Output). This active low output indicates that a
data bus transfer is completed. A pull-up resistor
(1K typical) is required at this output.
Data Bus D0 - D7 (Bidirectional). These pins
form the 8-bit bidirectional data bus of the
microprocessor port.
Address A0 to A10 (Input). These inputs provide
the A10 - A0 address lines to the internal
registers.
Internal Connection. Connected to VSS for
normal operation
Internal Connection. Connected to VSS for
normal operation
Signal Description
MT93L04A
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