MT93L04AG Zarlink Semiconductor, MT93L04AG Datasheet - Page 17

• Manufacturer Part Number: MT93L04AG
• Description: Description = 128-Channel Voice Echo CANceller ;; Package Type = Bga ;; No. Of Pins = 365
• Manufacturer: Zarlink Semiconductor

Preliminary Information
Pin Description (continued)
IRQB_d4
CSB_d4
R/WB_d4
DTAB_d4
D(2)_d4
D(3)_d4
A(0)_d4
A(1)_d4
A(5)_d4
A(6)_d4
A(9)_d4
A_IC1_d4
A_IC2_d4
DSB_d4
D(0)_d4
D(1)_d4
D(4)_d4
D(5)_d4
D(6)_d4
D(7)_d4
A(2)_d4
A(3)_d4
A(4)_d4
A(7)_d4
A(8)_d4
A(10)_d4
Signal Name
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
ICO
ICO
Signal Type
G17
H16
K16
H17
K17
K18
J16
K19
K20
J20
J19
J18
J17
H18
H19
H20
G20
G19
G18
F20
F19
F18
E20
E19
D20
E18
BGA Ball #
Interrupt Request (Open Drain Output). This
output goes low when an interrupt occurs in any
channel. IRQ returns high when all the interrupts
have been read from the Interrupt FIFO Register.
A pull-up resistor (1K typical) is required at this
output.
Data Strobe (Input). This active low input works
in conjunction with CS to enable the read and
write operations.
Chip Select (Input). This active low input is used
by a microprocessor to activate the
microprocessor port.
Read/Write (Input). This input controls the
direction of the data bus lines (D7-D0) during a
microprocessor access.
Data Transfer Acknowledgment (Open Drain
Output). This active low output indicates that a
data bus transfer is completed. A pull-up resistor
(1K typical) is required at this output.
Data Bus D0 - D7 (Bidirectional). These pins
form the 8-bit bidirectional data bus of the
microprocessor port.
Address A0 to A10 (Input). These inputs provide
the A10 - A0 address lines to the internal
registers.
Internal Connection. Connected to VSS for
normal operation
Internal Connection. Connected to VSS for
normal operation
Signal Description
MT93L04A
17