MT93L04AG Zarlink Semiconductor, MT93L04AG Datasheet - Page 33

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MT93L04AG

Manufacturer Part Number
MT93L04AG
Description
Description = 128-Channel Voice Echo CANceller ;; Package Type = Bga ;; No. Of Pins = 365
Manufacturer
Zarlink Semiconductor
Datasheet

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Part Number:
MT93L04AG2
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Quantity:
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Preliminary Information
Register Descriptions (continued)
Reset
Reset
Bit
Bit
TDis
0
7
6
5
4
3
7
7
7
Echo Canceller A, Control Register A1
Echo Canceller B, Control Register B1
Echo Canceller A, Control Register A2
Echo Canceller B, Control Register B2
INJDis
INJDis
PHDis
6
6
6
NLPDis
AutoTD
PHDis
NBDis
Name
Name
ExtDl
TDis
NLPDis
BBM
BBM
or
0
5
5
5
AutoTD
PAD
PAD
4
4
4
When high, Echo Cancellers A and B of the same group are internally cascaded into
one 128ms echo canceller.
When low, Echo Cancellers A and B of the same group operate independently.
Note: Do not enable both Extended-Delay and BBM configurations at the same time.
Control Register B1 bit-0 is a reserved bit and should be written “0”.
When high, tone detection is disabled. When low, tone detection is enabled.
When both Echo Cancellers A and B TDis bits are high, Tone Disable processors are
disabled entirely and are put into power down mode.
When high, the tone detectors will trigger upon the presence of a 2100Hz tone
regardless of the presence/absence of periodic phase reversals.
When low, the tone detectors will trigger only upon the presence of a 2100Hz tone
with periodic phase reversals.
When high, the non-linear processor is disabled.
When low, the non-linear processors function normally. Useful for G.165 conformance
testing.
When high, the echo canceller puts itself in Bypass mode when the tone detectors
detect the presence of 2100Hz tone. See PHDis for qualification of 2100Hz tones.
When low, the echo canceller algorithm will remain operational regardless of the state
of the 2100Hz tone detectors.
When high, the narrow-band detector is disabled. When low, the narrow-band
detector is enabled.
Bypass
Bypass
NBDis
3
3
3
HPFDis
AdpDis
AdpDis
2
2
2
MuteS
1
1
0
1
1
MuteR
ExtDl
0
0
0
0
Read/Write Address: 00
Reset Value:
Read/Write Address: 20
Reset Value:
Read/Write Address: 01
Read/Write Address: 21
Reset Value:
Description
Description
00
02
00
H
H
H
H
H
H
H
.
.
.
+ Base Address
+ Base Address
+ Base Address
+ Base Address
MT93L04A
33

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