MT93L04AG Zarlink Semiconductor, MT93L04AG Datasheet - Page 24

• Manufacturer Part Number: MT93L04AG
• Description: Description = 128-Channel Voice Echo CANceller ;; Package Type = Bga ;; No. Of Pins = 365
• Manufacturer: Zarlink Semiconductor

MT93L04A
Preliminary Information
is activated by setting the AutoTD bit in Control Register 2 to high. In external mode, an external controller is
needed to service the interrupts and poll the TD bits in the Status Registers. Following the detection of a
disable tone (TD bit high) on a given channel, the external controller must switch the echo canceller from
Enable Adaptation to Bypass state.
Instability Detector
In systems with very low echo channel return loss (ERL), there may be enough feedback in the loop to cause
stability problems in the adaptive filter. This instability can result in variable pitched ringing or oscillation.
Should this ringing occur, the Instability Detector will activate and suppress the oscillations.
The Instability Detector is activated by setting the RingClr bit in Control Register A3/B3 to "1".
Narrow Band Signal Detector (NBSD)
Single or dual frequency tones (i.e. DTMF tones) present in the receive input (Rin) of the echo canceller for a
prolonged period of time may cause the Adaptive Filter to diverge. The Narrow Band Signal Detector (NBSD) is
designed to prevent this by detecting single or dual tones of arbitrary frequency, phase, and amplitude. When
narrow band signals are detected, adaptation is halted but the echo canceller continues to cancel echo.
The NBSD can be disabled by setting the NBDis bit to “1” in Control Register 2.
Offset Null Filter
Adaptive filters in general do not operate properly when a DC offset is present at any inputs. To remove the DC
component, the MT93L00 incorporates Offset Null filters in both Rin and Sin inputs.
The offset null filters can be disabled by setting the HPFDis bit to “1” in Control Register 2.
ITU-T G.168 Compliance
The MT93L00 has been certified G.168 compliant in all 64 ms cancellation modes (i.e. Normal and Back-to-
Back configurations) by in-house testing with the DSPG ECT-1 echo canceller tester.
It should be noted that G.168 compliance is not claimed for the 128 ms Extended Delay mode, although
subjectively no difference can be noticed.
Device Configuration
The MT93L00 architecture contains 32 echo cancellers divided into 16 groups. Each group has two echo
cancellers which can be individually controlled (Echo Canceller A and B). They can be set in three distinct
configurations: Normal, Back-to-Back, and Extended Delay. See Figure 5.
Normal Configuration
In Normal configuration, the two echo cancellers (Echo Canceller A and B) are positioned in parallel, as shown
in Figure 5a, providing 64 milliseconds of echo cancellation in two channels simultaneously.
Back-to-Back Configuration
In Back-to-Back configuration, the two echo cancellers from the same group are positioned to cancel echo
coming from both directions in a single channel providing full-duplex 64ms echo cancellation. See Figure 5c.
This configuration uses only one timeslot on PORT1 and PORT2 and the second timeslot normally associated
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