MT57V1MH18E Micron Semiconductor Products, Inc., MT57V1MH18E Datasheet - Page 9

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MT57V1MH18E

Manufacturer Part Number
MT57V1MH18E
Description
18Mb DDR SRAM, 2.5V Vdd, Hstl, 4-Word Burst,
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet

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Table 5:
NOTE:
18Mb: 2.5V V
MT57V1MH18E_16_F.fm – Rev. F, Pub. 3/03
1. SA0 and SA1 are internally advanced in accordance with the burst order table. Bus cycle is terminated after burst
2. State transitions: L = (LD# = LOW); L# = (LD# = HIGH); R = (R/W# = HIGH); W = (R/W# = LOW).
3. State machine control timing sequence is controlled by K.
count = 4.
LOAD NEW ADDRESS
FIRST ADDRESS
Count=0
DD
, HSTL, Pipelined DDRb4 SRAM
(EXTERNAL)
X...X00
X...X01
X...X10
X...X11
Linear Burst Address
L, Count=4
R
W
L, Count=4
SECOND ADDRESS
Count=Count+2
Count=Count+2
WRITE DOUBLE
(INTERNAL)
READ DOUBLE
X...X01
X...X10
X...X11
X...X00
Bus Cycle State Diagram
2.5V V
L#, Count=4
L#, Count=4
Figure 4:
always
Count=2
always
Count=2
9
DD
L
, HSTL, PIPELINED DDRb4 SRAM
THIRD ADDRESS
ADVANCE ADDRESS
ADVANCE ADDRESS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(INTERNAL)
X...X10
X...X11
X...X00
X...X01
BY TWO 1
BY TWO 1
1 MEG x 18, 512K x 36
FOURTH ADDRESS
(INTERNAL)
POWER-UP
X...X11
X...X00
X...X01
X...X10
NOP
©2003 Micron Technology, Inc.
provided
voltage
Supply
L#

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