MT57V1MH18E Micron Semiconductor Products, Inc., MT57V1MH18E Datasheet - Page 4

• Manufacturer Part Number: MT57V1MH18E
• Description: 18Mb DDR SRAM, 2.5V Vdd, Hstl, 4-Word Burst,
• Manufacturer: Micron Semiconductor Products, Inc.

NOTE:
18Mb: 2.5V V
MT57V1MH18E_16_F.fm – Rev. F, Pub. 3/03
1. SA0 and SA1 are advanced in linear burst order at each K and K# rising edge.
2. The compare width is n – 2 bits. The compare is performed only if a WRITE is pending and a READ cycle is requested.
3. Figure 2 illustrates simplified device operation. See truth tables, ball descriptions, and timing diagrams for detailed
4. CQ and CQ# do not tri-state except during some JTAG test modes.
5. For 1 Meg x 18, n = 20 and a = 18.
BWx#
R/W#
LD#
K#
If the address matches, data is routed directly to the device outputs, bypassing the memory array.
information.
For 512K x 36, n = 19 and a = 36.
SA
K
DD
, HSTL, Pipelined DDRb4 SRAM
n
a
a
E
E
E
REGISTER
ADDRESS
REGISTER
REGISTER
ADDRESS
E
E
REGISTER
REGISTER
WRITE
R/W#
INPUT
INPUT
COMPARE
n
(NOTE 2)
a
WRITE#
a
SA0''’
SA0’
SA0#’
SA0’
SA0#’
SA0’
0
1
n
CLK
CLK
a
a
a
SA1
SA0
Figure 2: Functional Block Diagram
D1
D0
REGISTER
WRITE
C
BURST
LOGIC
(NOTE 1)
n-2
n
REGISTER
Q1
Q0
1 Meg x 18; 512K x 36
OE
a
a
SA0’
SA1’
DRIVER
WRITE
n
n
2.5V V
a
a
WRITE#
WRITE#
READ
MEMORY
ARRAY
2
n
x a
4
SA’
DD
SA0''
a
a
, HSTL, PIPELINED DDRb4 SRAM
SENSE
AMPS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
C#
C
C
a
a
CONTROL
OUTPUT
LOGIC
REGISTER
OUTPUT
1 MEG x 18, 512K x 36
a
a
SA0'''
MUX
2:1
0
1
a
a
a
OUTPUT
BUFFER
ZQ
E
©2003 Micron Technology, Inc.
a
2
CQ, CQ#
DQ