ADZS-BF537-EZLITE Analog Devices, ADZS-BF537-EZLITE Datasheet - Page 54

• Manufacturer Part Number: ADZS-BF537-EZLITE
• Description: Specifications: Type: DSP ; Contents: Evaluation Board, Software and Documentation ; For Use With/Related Products: ADSP-BF537 ; Lead Free Status: Lead Free ; RoHS Status: RoHS Compliant
• Manufacturer: Analog Devices

ADSP-BF534/ADSP-BF536/ADSP-BF537
Capacitive Loading
Output delays and holds are based on standard capacitive loads:
30 pF on all pins (see
Page 56
delay and hold specifications given should be derated by a factor
derived from these figures. The graphs in these figures may not
be linear outside the ranges shown.
V
LOAD
NOTES:
THE WORST CASE TRANSMISSION LINE DELAY IS SHOWN AND CAN BE USED
FOR THE OUTPUT TIMING ANALYSIS TO REFELECT THE TRANSMISSION LINE
EFFECT AND MUST BE CONSIDERED. THE TRANSMISSION LINE (TD) IS FOR
LOAD ONLY AND DOES NOT AFFECT THE DATA SHEET TIMING SPECIFICATIONS.
ANALOG DEVICES RECOMMENDS USING THE IBIS MODEL TIMING FOR A GIVEN
SYSTEM REQUIREMENT. IF NECESSARY, A SYSTEM MAY INCORPORATE
EXTERNAL DRIVERS TO COMPENSATE FOR ANY TIMING DIFFERENCES.
4pF
Figure 50. Equivalent Device Loading for AC Measurements
show how output rise time varies with capacitance. The
50Ω
70Ω
50Ω
400Ω
2pF
Figure
(Includes All Fixtures)
45Ω
0.5pF
TESTER PIN ELECTRONICS
50).
Figure 51
ZO = 50Ω (impedance)
TD = 4.04 ± 1.18 ns
through
T1
Figure 60 on
Rev. I | Page 54 of 68 | July 2010
OUTPUT
DUT
14
12
10
Figure 52. Typical Output Delay or Hold for Driver A at V
Figure 51. Typical Output Delay or Hold for Driver A at V
12
10
8
6
4
2
0
0
8
6
4
2
0
0
50
50
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
100
100
RISE TIME
RISE TIME
150
150
FALL TIME
FALL TIME
200
200
DDEXT
DDEXT
Max
Min
250
250