ADZS-BF537-EZLITE Analog Devices, ADZS-BF537-EZLITE Datasheet - Page 22

• Manufacturer Part Number: ADZS-BF537-EZLITE
• Description: Specifications: Type: DSP ; Contents: Evaluation Board, Software and Documentation ; For Use With/Related Products: ADSP-BF537 ; Lead Free Status: Lead Free ; RoHS Status: RoHS Compliant
• Manufacturer: Analog Devices

ADSP-BF534/ADSP-BF536/ADSP-BF537
Table 9. Pin Descriptions (Continued)
Pin Name
Port H: GPIO/10/100 Ethernet MAC (On
ADSP-BF534, these pins are GPIO only)
Port J: SPORT0/TWI/SPI Select/CAN
Real-Time Clock
JTAG Port
PH0 – GPIO/ETxD0
PH1 – GPIO/ETxD1
PH2 – GPIO/ETxD2
PH3 – GPIO/ETxD3
PH4 – GPIO/ETxEN
PH5 – GPIO/MII TxCLK/RMII REF_CLK
PH6 – GPIO/MII PHYINT/RMII MDINT
PH7 – GPIO/COL
PH8 – GPIO/ERxD0
PH9 – GPIO/ERxD1
PH10 – GPIO/ERxD2
PH11 – GPIO/ERxD3
PH12 – GPIO/ERxDV/TACLK5
PH13 – GPIO/ERxCLK/TACLK6
PH14 – GPIO/ERxER/TACLK7
PH15 – GPIO/MII CRS/RMII CRS_DV
PJ0 – MDC
PJ1 – MDIO
PJ2 – SCL
PJ3 – SDA
PJ4 – DR0SEC/CANRX/TACI0
PJ5 – DT0SEC/CANTX/SPI SSEL7
PJ6 – RSCLK0/TACLK2
PJ7 – RFS0/TACLK3
PJ8 – DR0PRI/TACLK4
PJ9 – TSCLK0/TACLK1
PJ10 – TFS0/SPI SSEL3
PJ11 – DT0PRI/SPI SSEL2
RTXI
RTXO
TCK
TDO
TDI
TMS
TRST
EMU
Type Function
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I/O
I/O
I/O
I
O
I/O
I/O
I
I/O
I/O
O
I
O
I
O
I
I
I
O
GPIO/Ethernet MII or RMII Transmit D0
GPIO/Ethernet MII or RMII Transmit D1
GPIO/Ethernet MII Transmit D2
GPIO/Ethernet MII Transmit D3
GPIO/Ethernet MII or RMII Transmit Enable
GPIO/Ethernet MII Transmit Clock/RMII Reference Clock
GPIO/Ethernet MII PHY Interrupt/RMII Management Data Interrupt (This pin
should be pulled high when used as a hibernate wake-up.)
GPIO/Ethernet Collision
GPIO/Ethernet MII or RMII Receive D0
GPIO/Ethernet MII or RMII Receive D1
GPIO/Ethernet MII Receive D2
GPIO/Ethernet MII Receive D3
GPIO/Ethernet MII Receive Data Valid/Alternate Timer5 Input Clock
GPIO/Ethernet MII Receive Clock/Alternate Timer6 Input Clock
GPIO/Ethernet MII or RMII Receive Error/Alternate Timer7 Input Clock
GPIO/Ethernet MII Carrier Sense/Ethernet RMII Carrier Sense and Receive Data
Valid
Ethernet Management Channel Clock (On ADSP-BF534 processors, do not
connect this pin.)
Ethernet Management Channel Serial Data (On ADSP-BF534 processors, tie this
pin to ground.)
TWI Serial Clock (This pin is an open-drain output and requires a pull-up
resistor.)
TWI Serial Data (This pin is an open-drain output and requires a pull-up
resistor.)
SPORT0 Receive Data Secondary/CAN Receive/Timer0 Alternate Input Capture
SPORT0 Transmit Data Secondary/CAN Transmit/SPI Slave Select Enable 7
SPORT0 Receive Serial Clock/Alternate Timer2 Clock Input
SPORT0 Receive Frame Sync/Alternate Timer3 Clock Input
SPORT0 Receive Data Primary/Alternate Timer4 Clock Input
SPORT0 Transmit Serial Clock/Alternate Timer1 Clock Input
SPORT0 Transmit Frame Sync/SPI Slave Select Enable 3
SPORT0 Transmit Data Primary/SPI Slave Select Enable 2
RTC Crystal Input (This pin should be pulled low when not used.)
RTC Crystal Output (Does not three-state in hibernate.)
JTAG Clock
JTAG Serial Data Out
JTAG Serial Data In
JTAG Mode Select
JTAG Reset (This pin should be pulled low if the JTAG port is not used.)
Emulation Output
Rev. I | Page 22 of 68 | July 2010
Driver
Type
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
F
F
C
D
C
D
C
C
C
C
1