DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 90
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
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2.2.2
• Address Space
• Extended Registers (En)
• Instruction Set
• Exception Vector Table and Memory Indirect Branch Addresses
Rev.7.00 Dec. 24, 2008 Page 36 of 698
REJ09B0074-0700
Linear access is provided to a 16-Mbyte maximum address space.
The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit
segments of 32-bit registers or address registers.
All instructions and addressing modes can be used.
In advanced mode the top area starting at H'00000000 is allocated to the exception vector table
in units of 32 bits. In each 32 bits, the upper 8 bits are ignored and a branch address is stored in
the lower 24 bits (figure 2.3). For details of the exception vector table, see section 4, Exception
Handling.
Advanced Mode
H'00000000
H'00000003
H'00000004
H'00000007
H'00000008
H'0000000B
H'0000000C
H'00000010
Figure 2.3 Exception Vector Table (Advanced Mode)
(Reserved for system use)
(Reserved for system use)
Reset exception vector
Exception vector 1
Reserved
Reserved
Reserved
Exception vector table
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