DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 655

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
19.2.2
An external clock signal can be input as shown in an example in figure 19.4. If the XTAL pin is
left open, make sure that stray capacitance is no more than 10 pF. When complementary clock
input to XTAL pin, the external clock input should be fixed high in standby mode, subactive
mode, subsleep mode, or watch mode.
Table 19.3 shows the input conditions for the external clock.
Table 19.3 External Clock Input Conditions
The external clock input conditions when the duty adjustment circuit is not used are shown in table
19.4. When the duty adjustment circuit is not used, note that the maximum operating frequency
depends on the external clock input waveform. For example, if t
= 5.25 ns, the maximum operating frequency becomes 19.2 MHz depending on the clcok cycle
time of 52.1 ns.
Item
External clock input low pulse width
External clock input high pulse width
External clock rise time
External clock fall time
Clock low pulse width level
Clock high pulse width level
Inputting External Clock
Figure 19.4 External Clock Input (Examples)
EXTAL
XTAL
EXTAL
XTAL
Symbol
t
t
t
t
t
t
EXL
EXH
EXr
EXf
CL
CH
(b) Complementary clock input at XTAL pin
min
65
65
0.35
0.35
VCC= 2.4 to 3.6V
(a) XTAL pin left open
max
15
15
0.65
0.65
Open
Min
25
25
0.4
0.4
VCC = 2.7 to 3.6V
Rev.7.00 Dec. 24, 2008 Page 601 of 698
External clock input
External clock input
max
6.25
6.25
0.6
0.6
EXL
min
15.5
15.5
0.4
0.4
= t
VCC = 3.0 to 3.6V
EXH
= 20.8 ns and t
max
5.25
5.25
0.6
0.6
REJ09B0074-0700
Unit
ns
ns
ns
ns
tcyc
tcyc
Test
Conditions
Figure 19.5
Figure 22.3
EXr
= t
EXf

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