DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 546
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
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14.3.29 USB Test Registers 2 and A to F (UTSTR2, UTSTRA to UTSTRF)
UTSTR2 and UTSRTA to UTSRTF are test registers and cannot be written to.
14.3.30 Module Stop Control Register B (MSTPCRB)
Rev.7.00 Dec. 24, 2008 Page 492 of 698
REJ09B0074-0700
Bit
7
6
5
4
3
2
1
0
Bit Name
MSTPB7
MSTPB6
MSTPB5
MSTPB4
MSTPB3
MSTPB2
MSTPB1
MSTPB0
Initial Value
1
1
1
1
1
1
1
1
R/W
R/W
R/W
Module Stop
For details, refer to section 20.1.3, Module Stop
Control Registers A to C (MSTPCRA to MSTPCRC).
USB Module Stop 2
0: Cancels the stop state of the USB module
1: Places the USB module partly in the stop state.
Description
completely.
A clock is provided for the USB module completely.
Before clearing this bit, make sure to clear the
USBSTOP1 bit in EXMDLSTP. After this bit has
been cleared, the internal PLL circuit starts
operation. Registers in the USB module must be
accessed after the USB operating clock stabilization
time (the CK48READY bit in UIFR3 is set to 1) has
passed.
The internal PLL circuit and the most of the clocks in
the USB module stop operation. However, register
values in the USB module are maintained.
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